Message ID | 20190501105228.24579-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v11] drm/i915: Engine discovery query | expand |
Quoting Tvrtko Ursulin (2019-05-01 11:52:28) > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Engine discovery query allows userspace to enumerate engines, probe their > configuration features, all without needing to maintain the internal PCI > ID based database. > > A new query for the generic i915 query ioctl is added named > DRM_I915_QUERY_ENGINE_INFO, together with accompanying structure > drm_i915_query_engine_info. The address of latter should be passed to the > kernel in the query.data_ptr field, and should be large enough for the > kernel to fill out all known engines as struct drm_i915_engine_info > elements trailing the query. > > As with other queries, setting the item query length to zero allows > userspace to query minimum required buffer size. > > Enumerated engines have common type mask which can be used to query all > hardware engines, versus engines userspace can submit to using the execbuf > uAPI. > > Engines also have capabilities which are per engine class namespace of > bits describing features not present on all engine instances. > > v2: > * Fixed HEVC assignment. > * Reorder some fields, rename type to flags, increase width. (Lionel) > * No need to allocate temporary storage if we do it engine by engine. > (Lionel) > > v3: > * Describe engine flags and mark mbz fields. (Lionel) > * HEVC only applies to VCS. > > v4: > * Squash SFC flag into main patch. > * Tidy some comments. > > v5: > * Add uabi_ prefix to engine capabilities. (Chris Wilson) > * Report exact size of engine info array. (Chris Wilson) > * Drop the engine flags. (Joonas Lahtinen) > * Added some more reserved fields. > * Move flags after class/instance. > > v6: > * Do not check engine info array was zeroed by userspace but zero the > unused fields for them instead. > > v7: > * Simplify length calculation loop. (Lionel Landwerlin) > > v8: > * Remove MBZ comments where not applicable. > * Rename ABI flags to match engine class define naming. > * Rename SFC ABI flag to reflect it applies to VCS and VECS. > * SFC is wired to even _logical_ engine instances. > * SFC applies to VCS and VECS. > * HEVC is present on all instances on Gen11. (Tony) > * Simplify length calculation even more. (Chris Wilson) > * Move info_ptr assigment closer to loop for clarity. (Chris Wilson) > * Use vdbox_sfc_access from runtime info. > * Rebase for RUNTIME_INFO. > * Refactor for lower indentation. > * Rename uAPI class/instance to engine_class/instance to avoid C++ > keyword. > > v9: > * Rebase for s/num_rings/num_engines/ in RUNTIME_INFO. > > v10: > * Use new copy_query_item. > > v11: > * Consolidate with struct i915_engine_class_instnace. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Jon Bloomfield <jon.bloomfield@intel.com> > Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> > Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Tony Ye <tony.ye@intel.com> > Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> # v7 > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v7 > --- > +/** > + * struct drm_i915_engine_info > + * > + * Describes one engine and it's capabilities as known to the driver. > + */ > +struct drm_i915_engine_info { > + /** Engine class and instance. */ > + struct i915_engine_class_instance engine; > + > + /** Reserved field. */ > + __u32 rsvd0; > + > + /** Engine flags. */ > + __u64 flags; Do you think we could do something like BUILD_BUG_ON(!IS_ALIGNED(offsetof(*info, flags), sizeof(info->flags)); Will that work, and worthwhile? Maybe work into a BUILD_BUG_ON(check_user_alignment(info, flags)); Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
On 01/05/2019 12:10, Chris Wilson wrote: > Quoting Tvrtko Ursulin (2019-05-01 11:52:28) >> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >> >> Engine discovery query allows userspace to enumerate engines, probe their >> configuration features, all without needing to maintain the internal PCI >> ID based database. >> >> A new query for the generic i915 query ioctl is added named >> DRM_I915_QUERY_ENGINE_INFO, together with accompanying structure >> drm_i915_query_engine_info. The address of latter should be passed to the >> kernel in the query.data_ptr field, and should be large enough for the >> kernel to fill out all known engines as struct drm_i915_engine_info >> elements trailing the query. >> >> As with other queries, setting the item query length to zero allows >> userspace to query minimum required buffer size. >> >> Enumerated engines have common type mask which can be used to query all >> hardware engines, versus engines userspace can submit to using the execbuf >> uAPI. >> >> Engines also have capabilities which are per engine class namespace of >> bits describing features not present on all engine instances. >> >> v2: >> * Fixed HEVC assignment. >> * Reorder some fields, rename type to flags, increase width. (Lionel) >> * No need to allocate temporary storage if we do it engine by engine. >> (Lionel) >> >> v3: >> * Describe engine flags and mark mbz fields. (Lionel) >> * HEVC only applies to VCS. >> >> v4: >> * Squash SFC flag into main patch. >> * Tidy some comments. >> >> v5: >> * Add uabi_ prefix to engine capabilities. (Chris Wilson) >> * Report exact size of engine info array. (Chris Wilson) >> * Drop the engine flags. (Joonas Lahtinen) >> * Added some more reserved fields. >> * Move flags after class/instance. >> >> v6: >> * Do not check engine info array was zeroed by userspace but zero the >> unused fields for them instead. >> >> v7: >> * Simplify length calculation loop. (Lionel Landwerlin) >> >> v8: >> * Remove MBZ comments where not applicable. >> * Rename ABI flags to match engine class define naming. >> * Rename SFC ABI flag to reflect it applies to VCS and VECS. >> * SFC is wired to even _logical_ engine instances. >> * SFC applies to VCS and VECS. >> * HEVC is present on all instances on Gen11. (Tony) >> * Simplify length calculation even more. (Chris Wilson) >> * Move info_ptr assigment closer to loop for clarity. (Chris Wilson) >> * Use vdbox_sfc_access from runtime info. >> * Rebase for RUNTIME_INFO. >> * Refactor for lower indentation. >> * Rename uAPI class/instance to engine_class/instance to avoid C++ >> keyword. >> >> v9: >> * Rebase for s/num_rings/num_engines/ in RUNTIME_INFO. >> >> v10: >> * Use new copy_query_item. >> >> v11: >> * Consolidate with struct i915_engine_class_instnace. >> >> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >> Cc: Chris Wilson <chris@chris-wilson.co.uk> >> Cc: Jon Bloomfield <jon.bloomfield@intel.com> >> Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> >> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> >> Cc: Tony Ye <tony.ye@intel.com> >> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> # v7 >> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v7 >> --- >> +/** >> + * struct drm_i915_engine_info >> + * >> + * Describes one engine and it's capabilities as known to the driver. >> + */ >> +struct drm_i915_engine_info { >> + /** Engine class and instance. */ >> + struct i915_engine_class_instance engine; >> + >> + /** Reserved field. */ >> + __u32 rsvd0; >> + >> + /** Engine flags. */ >> + __u64 flags; > > Do you think we could do something like > BUILD_BUG_ON(!IS_ALIGNED(offsetof(*info, flags), sizeof(info->flags)); > > Will that work, and worthwhile? Maybe work into a > > BUILD_BUG_ON(check_user_alignment(info, flags)); Hmm.. probably manual check for no holes _and_ alignment is good enough for uAPI since once it's in it's in. Will triple-check. > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Thanks! I apparently messed up the actual branch and will resend once IGT series finished so I can play with Test-with: Regards, Tvrtko
Quoting Tvrtko Ursulin (2019-05-01 12:45:36) > > On 01/05/2019 12:10, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-05-01 11:52:28) > >> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > >> > >> Engine discovery query allows userspace to enumerate engines, probe their > >> configuration features, all without needing to maintain the internal PCI > >> ID based database. > >> > >> A new query for the generic i915 query ioctl is added named > >> DRM_I915_QUERY_ENGINE_INFO, together with accompanying structure > >> drm_i915_query_engine_info. The address of latter should be passed to the > >> kernel in the query.data_ptr field, and should be large enough for the > >> kernel to fill out all known engines as struct drm_i915_engine_info > >> elements trailing the query. > >> > >> As with other queries, setting the item query length to zero allows > >> userspace to query minimum required buffer size. > >> > >> Enumerated engines have common type mask which can be used to query all > >> hardware engines, versus engines userspace can submit to using the execbuf > >> uAPI. > >> > >> Engines also have capabilities which are per engine class namespace of > >> bits describing features not present on all engine instances. > >> > >> v2: > >> * Fixed HEVC assignment. > >> * Reorder some fields, rename type to flags, increase width. (Lionel) > >> * No need to allocate temporary storage if we do it engine by engine. > >> (Lionel) > >> > >> v3: > >> * Describe engine flags and mark mbz fields. (Lionel) > >> * HEVC only applies to VCS. > >> > >> v4: > >> * Squash SFC flag into main patch. > >> * Tidy some comments. > >> > >> v5: > >> * Add uabi_ prefix to engine capabilities. (Chris Wilson) > >> * Report exact size of engine info array. (Chris Wilson) > >> * Drop the engine flags. (Joonas Lahtinen) > >> * Added some more reserved fields. > >> * Move flags after class/instance. > >> > >> v6: > >> * Do not check engine info array was zeroed by userspace but zero the > >> unused fields for them instead. > >> > >> v7: > >> * Simplify length calculation loop. (Lionel Landwerlin) > >> > >> v8: > >> * Remove MBZ comments where not applicable. > >> * Rename ABI flags to match engine class define naming. > >> * Rename SFC ABI flag to reflect it applies to VCS and VECS. > >> * SFC is wired to even _logical_ engine instances. > >> * SFC applies to VCS and VECS. > >> * HEVC is present on all instances on Gen11. (Tony) > >> * Simplify length calculation even more. (Chris Wilson) > >> * Move info_ptr assigment closer to loop for clarity. (Chris Wilson) > >> * Use vdbox_sfc_access from runtime info. > >> * Rebase for RUNTIME_INFO. > >> * Refactor for lower indentation. > >> * Rename uAPI class/instance to engine_class/instance to avoid C++ > >> keyword. > >> > >> v9: > >> * Rebase for s/num_rings/num_engines/ in RUNTIME_INFO. > >> > >> v10: > >> * Use new copy_query_item. > >> > >> v11: > >> * Consolidate with struct i915_engine_class_instnace. > >> > >> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > >> Cc: Chris Wilson <chris@chris-wilson.co.uk> > >> Cc: Jon Bloomfield <jon.bloomfield@intel.com> > >> Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> > >> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> > >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > >> Cc: Tony Ye <tony.ye@intel.com> > >> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> # v7 > >> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v7 > >> --- > >> +/** > >> + * struct drm_i915_engine_info > >> + * > >> + * Describes one engine and it's capabilities as known to the driver. > >> + */ > >> +struct drm_i915_engine_info { > >> + /** Engine class and instance. */ > >> + struct i915_engine_class_instance engine; > >> + > >> + /** Reserved field. */ > >> + __u32 rsvd0; > >> + > >> + /** Engine flags. */ > >> + __u64 flags; > > > > Do you think we could do something like > > BUILD_BUG_ON(!IS_ALIGNED(offsetof(*info, flags), sizeof(info->flags)); > > > > Will that work, and worthwhile? Maybe work into a > > > > BUILD_BUG_ON(check_user_alignment(info, flags)); > > Hmm.. probably manual check for no holes _and_ alignment is good enough > for uAPI since once it's in it's in. Will triple-check. Yeah, we actually need something more like offsetofend(previous_field) == offsetof(next_field) BUILD_BUG_ON(check_user_struct(info, previous_field, next_field)) ? -Chris
On 01/05/2019 12:55, Chris Wilson wrote: > Quoting Tvrtko Ursulin (2019-05-01 12:45:36) >> >> On 01/05/2019 12:10, Chris Wilson wrote: >>> Quoting Tvrtko Ursulin (2019-05-01 11:52:28) >>>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >>>> >>>> Engine discovery query allows userspace to enumerate engines, probe their >>>> configuration features, all without needing to maintain the internal PCI >>>> ID based database. >>>> >>>> A new query for the generic i915 query ioctl is added named >>>> DRM_I915_QUERY_ENGINE_INFO, together with accompanying structure >>>> drm_i915_query_engine_info. The address of latter should be passed to the >>>> kernel in the query.data_ptr field, and should be large enough for the >>>> kernel to fill out all known engines as struct drm_i915_engine_info >>>> elements trailing the query. >>>> >>>> As with other queries, setting the item query length to zero allows >>>> userspace to query minimum required buffer size. >>>> >>>> Enumerated engines have common type mask which can be used to query all >>>> hardware engines, versus engines userspace can submit to using the execbuf >>>> uAPI. >>>> >>>> Engines also have capabilities which are per engine class namespace of >>>> bits describing features not present on all engine instances. >>>> >>>> v2: >>>> * Fixed HEVC assignment. >>>> * Reorder some fields, rename type to flags, increase width. (Lionel) >>>> * No need to allocate temporary storage if we do it engine by engine. >>>> (Lionel) >>>> >>>> v3: >>>> * Describe engine flags and mark mbz fields. (Lionel) >>>> * HEVC only applies to VCS. >>>> >>>> v4: >>>> * Squash SFC flag into main patch. >>>> * Tidy some comments. >>>> >>>> v5: >>>> * Add uabi_ prefix to engine capabilities. (Chris Wilson) >>>> * Report exact size of engine info array. (Chris Wilson) >>>> * Drop the engine flags. (Joonas Lahtinen) >>>> * Added some more reserved fields. >>>> * Move flags after class/instance. >>>> >>>> v6: >>>> * Do not check engine info array was zeroed by userspace but zero the >>>> unused fields for them instead. >>>> >>>> v7: >>>> * Simplify length calculation loop. (Lionel Landwerlin) >>>> >>>> v8: >>>> * Remove MBZ comments where not applicable. >>>> * Rename ABI flags to match engine class define naming. >>>> * Rename SFC ABI flag to reflect it applies to VCS and VECS. >>>> * SFC is wired to even _logical_ engine instances. >>>> * SFC applies to VCS and VECS. >>>> * HEVC is present on all instances on Gen11. (Tony) >>>> * Simplify length calculation even more. (Chris Wilson) >>>> * Move info_ptr assigment closer to loop for clarity. (Chris Wilson) >>>> * Use vdbox_sfc_access from runtime info. >>>> * Rebase for RUNTIME_INFO. >>>> * Refactor for lower indentation. >>>> * Rename uAPI class/instance to engine_class/instance to avoid C++ >>>> keyword. >>>> >>>> v9: >>>> * Rebase for s/num_rings/num_engines/ in RUNTIME_INFO. >>>> >>>> v10: >>>> * Use new copy_query_item. >>>> >>>> v11: >>>> * Consolidate with struct i915_engine_class_instnace. >>>> >>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >>>> Cc: Chris Wilson <chris@chris-wilson.co.uk> >>>> Cc: Jon Bloomfield <jon.bloomfield@intel.com> >>>> Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> >>>> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> >>>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> >>>> Cc: Tony Ye <tony.ye@intel.com> >>>> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> # v7 >>>> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v7 >>>> --- >>>> +/** >>>> + * struct drm_i915_engine_info >>>> + * >>>> + * Describes one engine and it's capabilities as known to the driver. >>>> + */ >>>> +struct drm_i915_engine_info { >>>> + /** Engine class and instance. */ >>>> + struct i915_engine_class_instance engine; >>>> + >>>> + /** Reserved field. */ >>>> + __u32 rsvd0; >>>> + >>>> + /** Engine flags. */ >>>> + __u64 flags; >>> >>> Do you think we could do something like >>> BUILD_BUG_ON(!IS_ALIGNED(offsetof(*info, flags), sizeof(info->flags)); >>> >>> Will that work, and worthwhile? Maybe work into a >>> >>> BUILD_BUG_ON(check_user_alignment(info, flags)); >> >> Hmm.. probably manual check for no holes _and_ alignment is good enough >> for uAPI since once it's in it's in. Will triple-check. > > Yeah, we actually need something more like > offsetofend(previous_field) == offsetof(next_field) > > BUILD_BUG_ON(check_user_struct(info, previous_field, next_field)) ? How would you logistically do it? List all struct members for each uapi struct you want to check? Maybe a variadic macro like: CHECK_USER_STRUCT_FUNCTION(type, member0, ... memberN); Which expands to a dedicated function to check this type, using va_start/va_end to iterate all members checking for holes. So somewhere in code we would also need: CHECK_USER_STRUCT(type); Which would call the function. But thats not build time.. Could be under debug and selftests I guess. Could even be IGT in this case. But I am not to keen in listing each struct member with a prev/next_field BUILD_BUG_ON. Perhaps IGT is indeed a better place to start testing for this. Since we anyway require each new uAPI to have good IGT coverage. Regards, Tvrtko
Quoting Tvrtko Ursulin (2019-05-01 16:51:28) > > On 01/05/2019 12:55, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-05-01 12:45:36) > >> Hmm.. probably manual check for no holes _and_ alignment is good enough > >> for uAPI since once it's in it's in. Will triple-check. > > > > Yeah, we actually need something more like > > offsetofend(previous_field) == offsetof(next_field) > > > > BUILD_BUG_ON(check_user_struct(info, previous_field, next_field)) ? > > How would you logistically do it? List all struct members for each uapi > struct you want to check? > > Maybe a variadic macro like: > > CHECK_USER_STRUCT_FUNCTION(type, member0, ... memberN); > > Which expands to a dedicated function to check this type, using > va_start/va_end to iterate all members checking for holes. So somewhere > in code we would also need: > > CHECK_USER_STRUCT(type); > > Which would call the function. But thats not build time.. Could be under > debug and selftests I guess. Could even be IGT in this case. > > But I am not to keen in listing each struct member with a > prev/next_field BUILD_BUG_ON. > > Perhaps IGT is indeed a better place to start testing for this. Since we > anyway require each new uAPI to have good IGT coverage. Definitely don't like the idea of doing it manually, I could have just about accepted it if we could have rolled it into a get_user wrapper. We should just go annoy Jani to whip up some Makefile magic to call pahole and check the structs defined in uapi.h -Chris
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index f7308479d511..dc1df1e0a9c7 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -343,6 +343,45 @@ intel_engine_setup(struct drm_i915_private *dev_priv, return 0; } +static void __setup_engine_capabilities(struct intel_engine_cs *engine) +{ + struct drm_i915_private *i915 = engine->i915; + + if (engine->class == VIDEO_DECODE_CLASS) { + /* + * HEVC support is present on first engine instance + * before Gen11 and on all instances afterwards. + */ + if (INTEL_GEN(i915) >= 11 || + (INTEL_GEN(i915) >= 9 && engine->instance == 0)) + engine->uabi_capabilities |= + I915_VIDEO_CLASS_CAPABILITY_HEVC; + + /* + * SFC block is present only on even logical engine + * instances. + */ + if ((INTEL_GEN(i915) >= 11 && + RUNTIME_INFO(i915)->vdbox_sfc_access & engine->mask) || + (INTEL_GEN(i915) >= 9 && engine->instance == 0)) + engine->uabi_capabilities |= + I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC; + } else if (engine->class == VIDEO_ENHANCEMENT_CLASS) { + if (INTEL_GEN(i915) >= 9) + engine->uabi_capabilities |= + I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC; + } +} + +static void intel_setup_engine_capabilities(struct drm_i915_private *i915) +{ + struct intel_engine_cs *engine; + enum intel_engine_id id; + + for_each_engine(engine, i915, id) + __setup_engine_capabilities(engine); +} + /** * intel_engines_init_mmio() - allocate and prepare the Engine Command Streamers * @dev_priv: i915 device private @@ -395,6 +434,8 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv) i915_check_and_clear_faults(dev_priv); + intel_setup_engine_capabilities(i915); + return 0; cleanup: diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index d972c339309c..211b3fd76d58 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -279,6 +279,8 @@ struct intel_engine_cs { u32 context_size; u32 mmio_base; + u32 uabi_capabilities; + struct intel_sseu sseu; struct intel_ring *buffer; diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 782183b78f49..414d0a6d1f70 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -96,9 +96,58 @@ static int query_topology_info(struct drm_i915_private *dev_priv, return total_length; } +static int +query_engine_info(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + struct drm_i915_query_engine_info __user *query_ptr = + u64_to_user_ptr(query_item->data_ptr); + struct drm_i915_engine_info __user *info_ptr; + struct drm_i915_query_engine_info query; + struct drm_i915_engine_info info = { }; + struct intel_engine_cs *engine; + enum intel_engine_id id; + int len, ret; + + if (query_item->flags) + return -EINVAL; + + len = sizeof(struct drm_i915_query_engine_info) + + RUNTIME_INFO(i915)->num_engines * + sizeof(struct drm_i915_engine_info); + + ret = copy_query_item(&query, sizeof(query), len, query_item); + if (ret != 0) + return ret; + + if (query.num_engines || query.rsvd[0] || query.rsvd[1] || + query.rsvd[2]) + return -EINVAL; + + info_ptr = &query_ptr->engines[0]; + + for_each_engine(engine, i915, id) { + info.engine.engine_class = engine->uabi_class; + info.engine.engine_instance = engine->instance; + info.capabilities = engine->uabi_capabilities; + + if (__copy_to_user(info_ptr, &info, sizeof(info))) + return -EFAULT; + + query.num_engines++; + info_ptr++; + } + + if (__copy_to_user(query_ptr, &query, sizeof(query))) + return -EFAULT; + + return len; +} + static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv, struct drm_i915_query_item *query_item) = { query_topology_info, + query_engine_info, }; int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 3a73f5316766..8c54b766e9a1 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1821,6 +1821,7 @@ struct drm_i915_perf_oa_config { struct drm_i915_query_item { __u64 query_id; #define DRM_I915_QUERY_TOPOLOGY_INFO 1 +#define DRM_I915_QUERY_ENGINE_INFO 2 /* Must be kept compact -- no holes and well documented */ /* @@ -1919,6 +1920,47 @@ struct drm_i915_query_topology_info { __u8 data[]; }; +/** + * struct drm_i915_engine_info + * + * Describes one engine and it's capabilities as known to the driver. + */ +struct drm_i915_engine_info { + /** Engine class and instance. */ + struct i915_engine_class_instance engine; + + /** Reserved field. */ + __u32 rsvd0; + + /** Engine flags. */ + __u64 flags; + + /** Capabilities of this engine. */ + __u64 capabilities; +#define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0) +#define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1) + + /** Reserved fields. */ + __u64 rsvd1[4]; +}; + +/** + * struct drm_i915_query_engine_info + * + * Engine info query enumerates all engines known to the driver by filling in + * an array of struct drm_i915_engine_info structures. + */ +struct drm_i915_query_engine_info { + /** Number of struct drm_i915_engine_info structs following. */ + __u32 num_engines; + + /** MBZ */ + __u32 rsvd[3]; + + /** Marker for drm_i915_engine_info structures. */ + struct drm_i915_engine_info engines[]; +}; + #if defined(__cplusplus) } #endif