| Message ID | 20190501153450.30494-4-stuart.summers@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Refactor to expand subslice mask | expand |
On 5/1/19 8:34 AM, Stuart Summers wrote: > Add a new function to return the number of subslices per slice to > consolidate code usage. > > v2: rebase on changes to move sseu struct to intel_sseu.h > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Stuart Summers <stuart.summers@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_sseu.h | 6 ++++++ > drivers/gpu/drm/i915/i915_debugfs.c | 2 +- > drivers/gpu/drm/i915/intel_device_info.c | 4 ++-- > 3 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h > index c0b16b248d4c..f5ff6b7a756a 100644 > --- a/drivers/gpu/drm/i915/gt/intel_sseu.h > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h > @@ -63,6 +63,12 @@ intel_sseu_from_device_info(const struct sseu_dev_info *sseu) > return value; > } > > +static inline unsigned int > +sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice) This is exposed, so needs an intel_* prefix. with that: Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Daniele > +{ > + return hweight8(sseu->subslice_mask[slice]); > +} > + > u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, > const struct intel_sseu *req_sseu); > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 0e4dffcd4da4..fe854c629a32 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -4185,7 +4185,7 @@ static void i915_print_sseu_info(struct seq_file *m, bool is_available_info, > sseu_subslice_total(sseu)); > for (s = 0; s < fls(sseu->slice_mask); s++) { > seq_printf(m, " %s Slice%i subslices: %u\n", type, > - s, hweight8(sseu->subslice_mask[s])); > + s, sseu_subslices_per_slice(sseu, s)); > } > seq_printf(m, " %s EU Total: %u\n", type, > sseu->eu_total); > diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c > index 6af480b95bc6..559cf0d0628e 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.c > +++ b/drivers/gpu/drm/i915/intel_device_info.c > @@ -93,7 +93,7 @@ static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p) > drm_printf(p, "subslice total: %u\n", sseu_subslice_total(sseu)); > for (s = 0; s < sseu->max_slices; s++) { > drm_printf(p, "slice%d: %u subslices, mask=%04x\n", > - s, hweight8(sseu->subslice_mask[s]), > + s, sseu_subslices_per_slice(sseu, s), > sseu->subslice_mask[s]); > } > drm_printf(p, "EU total: %u\n", sseu->eu_total); > @@ -126,7 +126,7 @@ void intel_device_info_dump_topology(const struct sseu_dev_info *sseu, > > for (s = 0; s < sseu->max_slices; s++) { > drm_printf(p, "slice%d: %u subslice(s) (0x%hhx):\n", > - s, hweight8(sseu->subslice_mask[s]), > + s, sseu_subslices_per_slice(sseu, s), > sseu->subslice_mask[s]); > > for (ss = 0; ss < sseu->max_subslices; ss++) { >
On Wed, 2019-05-01 at 11:14 -0700, Daniele Ceraolo Spurio wrote: > > On 5/1/19 8:34 AM, Stuart Summers wrote: > > Add a new function to return the number of subslices per slice to > > consolidate code usage. > > > > v2: rebase on changes to move sseu struct to intel_sseu.h > > > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com> > > --- > > drivers/gpu/drm/i915/gt/intel_sseu.h | 6 ++++++ > > drivers/gpu/drm/i915/i915_debugfs.c | 2 +- > > drivers/gpu/drm/i915/intel_device_info.c | 4 ++-- > > 3 files changed, 9 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h > > b/drivers/gpu/drm/i915/gt/intel_sseu.h > > index c0b16b248d4c..f5ff6b7a756a 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_sseu.h > > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h > > @@ -63,6 +63,12 @@ intel_sseu_from_device_info(const struct > > sseu_dev_info *sseu) > > return value; > > } > > > > +static inline unsigned int > > +sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 > > slice) > > This is exposed, so needs an intel_* prefix. with that: Will change in the next series update. Thanks for the review! -Stuart > > Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > Daniele > > > +{ > > + return hweight8(sseu->subslice_mask[slice]); > > +} > > + > > u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, > > const struct intel_sseu *req_sseu); > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > > b/drivers/gpu/drm/i915/i915_debugfs.c > > index 0e4dffcd4da4..fe854c629a32 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -4185,7 +4185,7 @@ static void i915_print_sseu_info(struct > > seq_file *m, bool is_available_info, > > sseu_subslice_total(sseu)); > > for (s = 0; s < fls(sseu->slice_mask); s++) { > > seq_printf(m, " %s Slice%i subslices: %u\n", type, > > - s, hweight8(sseu->subslice_mask[s])); > > + s, sseu_subslices_per_slice(sseu, s)); > > } > > seq_printf(m, " %s EU Total: %u\n", type, > > sseu->eu_total); > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > > b/drivers/gpu/drm/i915/intel_device_info.c > > index 6af480b95bc6..559cf0d0628e 100644 > > --- a/drivers/gpu/drm/i915/intel_device_info.c > > +++ b/drivers/gpu/drm/i915/intel_device_info.c > > @@ -93,7 +93,7 @@ static void sseu_dump(const struct sseu_dev_info > > *sseu, struct drm_printer *p) > > drm_printf(p, "subslice total: %u\n", > > sseu_subslice_total(sseu)); > > for (s = 0; s < sseu->max_slices; s++) { > > drm_printf(p, "slice%d: %u subslices, mask=%04x\n", > > - s, hweight8(sseu->subslice_mask[s]), > > + s, sseu_subslices_per_slice(sseu, s), > > sseu->subslice_mask[s]); > > } > > drm_printf(p, "EU total: %u\n", sseu->eu_total); > > @@ -126,7 +126,7 @@ void intel_device_info_dump_topology(const > > struct sseu_dev_info *sseu, > > > > for (s = 0; s < sseu->max_slices; s++) { > > drm_printf(p, "slice%d: %u subslice(s) (0x%hhx):\n", > > - s, hweight8(sseu->subslice_mask[s]), > > + s, sseu_subslices_per_slice(sseu, s), > > sseu->subslice_mask[s]); > > > > for (ss = 0; ss < sseu->max_subslices; ss++) { > >
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h index c0b16b248d4c..f5ff6b7a756a 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.h +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h @@ -63,6 +63,12 @@ intel_sseu_from_device_info(const struct sseu_dev_info *sseu) return value; } +static inline unsigned int +sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice) +{ + return hweight8(sseu->subslice_mask[slice]); +} + u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, const struct intel_sseu *req_sseu); diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 0e4dffcd4da4..fe854c629a32 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -4185,7 +4185,7 @@ static void i915_print_sseu_info(struct seq_file *m, bool is_available_info, sseu_subslice_total(sseu)); for (s = 0; s < fls(sseu->slice_mask); s++) { seq_printf(m, " %s Slice%i subslices: %u\n", type, - s, hweight8(sseu->subslice_mask[s])); + s, sseu_subslices_per_slice(sseu, s)); } seq_printf(m, " %s EU Total: %u\n", type, sseu->eu_total); diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 6af480b95bc6..559cf0d0628e 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -93,7 +93,7 @@ static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p) drm_printf(p, "subslice total: %u\n", sseu_subslice_total(sseu)); for (s = 0; s < sseu->max_slices; s++) { drm_printf(p, "slice%d: %u subslices, mask=%04x\n", - s, hweight8(sseu->subslice_mask[s]), + s, sseu_subslices_per_slice(sseu, s), sseu->subslice_mask[s]); } drm_printf(p, "EU total: %u\n", sseu->eu_total); @@ -126,7 +126,7 @@ void intel_device_info_dump_topology(const struct sseu_dev_info *sseu, for (s = 0; s < sseu->max_slices; s++) { drm_printf(p, "slice%d: %u subslice(s) (0x%hhx):\n", - s, hweight8(sseu->subslice_mask[s]), + s, sseu_subslices_per_slice(sseu, s), sseu->subslice_mask[s]); for (ss = 0; ss < sseu->max_subslices; ss++) {
Add a new function to return the number of subslices per slice to consolidate code usage. v2: rebase on changes to move sseu struct to intel_sseu.h Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Stuart Summers <stuart.summers@intel.com> --- drivers/gpu/drm/i915/gt/intel_sseu.h | 6 ++++++ drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/intel_device_info.c | 4 ++-- 3 files changed, 9 insertions(+), 3 deletions(-)