From patchwork Fri May 17 11:25:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10947845 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 92F571398 for ; Fri, 17 May 2019 11:26:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8130522BF1 for ; Fri, 17 May 2019 11:26:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 75EEC26BE9; Fri, 17 May 2019 11:26:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,HK_RANDOM_FROM, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1099022F3E for ; Fri, 17 May 2019 11:26:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC0DD899B0; Fri, 17 May 2019 11:26:07 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E3B189949; Fri, 17 May 2019 11:25:54 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 May 2019 04:25:54 -0700 X-ExtLoop1: 1 Received: from kmarenda-mobl2.ger.corp.intel.com (HELO localhost.localdomain) ([10.252.11.159]) by fmsmga005.fm.intel.com with ESMTP; 17 May 2019 04:25:53 -0700 From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org Date: Fri, 17 May 2019 12:25:20 +0100 Message-Id: <20190517112526.6738-20-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com> References: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 19/25] gem_wsim: Command line switch for specifying low slice count workloads X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin A new command line switch ('-s') is added which toggles the low slice count mode for workloads following on the command line. This enables easy benchmarking of the effect of running the existing media workloads in parallel against another client. For example: ./gem_wsim -n ... -v -r 600 -W master.wsim -s -w media_nn480.wsim Adding or removing the '-s' switch before the second workload enables analyzing the cost of dynamic SSEU switching impacted to the first (master) workload. Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson --- benchmarks/gem_wsim.c | 44 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 40 insertions(+), 4 deletions(-) diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c index a36873640b24..875838f65128 100644 --- a/benchmarks/gem_wsim.c +++ b/benchmarks/gem_wsim.c @@ -100,6 +100,7 @@ struct w_arg { char *filename; char *desc; int prio; + bool sseu; }; struct bond { @@ -179,6 +180,7 @@ struct workload unsigned int nr_steps; struct w_step *steps; int prio; + bool sseu; pthread_t thread; bool run; @@ -251,6 +253,7 @@ static int fd; #define GLOBAL_BALANCE (1<<8) #define DEPSYNC (1<<9) #define I915 (1<<10) +#define SSEU (1<<11) #define SEQNO_IDX(engine) ((engine) * 16) #define SEQNO_OFFSET(engine) (SEQNO_IDX(engine) * sizeof(uint32_t)) @@ -726,6 +729,7 @@ add_step: wrk->nr_steps = nr_steps; wrk->steps = steps; wrk->prio = arg->prio; + wrk->sseu = arg->sseu; free(desc); @@ -771,6 +775,7 @@ clone_workload(struct workload *_wrk) memset(wrk, 0, sizeof(*wrk)); wrk->prio = _wrk->prio; + wrk->sseu = _wrk->sseu; wrk->nr_steps = _wrk->nr_steps; wrk->steps = calloc(wrk->nr_steps, sizeof(struct w_step)); igt_assert(wrk->steps); @@ -1136,6 +1141,26 @@ find_engine(struct i915_engine_class_instance *ci, unsigned int count, return 0; } +static void +set_ctx_sseu(uint32_t ctx) +{ + struct drm_i915_gem_context_param_sseu sseu = { }; + struct drm_i915_gem_context_param param = { }; + + sseu.class = I915_ENGINE_CLASS_RENDER; + sseu.instance = 0; + + param.ctx_id = ctx; + param.param = I915_CONTEXT_PARAM_SSEU; + param.value = (uintptr_t)&sseu; + + gem_context_get_param(fd, ¶m); + + sseu.slice_mask = 1; + + gem_context_set_param(fd, ¶m); +} + static int prepare_workload(unsigned int id, struct workload *wrk, unsigned int flags) { @@ -1494,6 +1519,9 @@ prepare_workload(unsigned int id, struct workload *wrk, unsigned int flags) gem_context_set_param(fd, ¶m); } + if (wrk->sseu) + set_ctx_sseu(arg.ctx_id); + if (share_vm) vm_destroy(fd, share_vm); } @@ -2668,6 +2696,8 @@ static void print_help(void) " -R Round-robin initial VCS assignment per client.\n" " -H Send heartbeat on synchronisation points with seqno based\n" " balancers. Gives better engine busyness view in some cases.\n" +" -s Turn on small SSEU config for the next workload on the\n" +" command line. Subsequent -s switches it off.\n" " -S Synchronize the sequence of random batch durations between\n" " clients.\n" " -G Global load balancing - a single load balancer will be shared\n" @@ -2710,11 +2740,12 @@ static char *load_workload_descriptor(char *filename) } static struct w_arg * -add_workload_arg(struct w_arg *w_args, unsigned int nr_args, char *w_arg, int prio) +add_workload_arg(struct w_arg *w_args, unsigned int nr_args, char *w_arg, + int prio, bool sseu) { w_args = realloc(w_args, sizeof(*w_args) * nr_args); igt_assert(w_args); - w_args[nr_args - 1] = (struct w_arg) { w_arg, NULL, prio }; + w_args[nr_args - 1] = (struct w_arg) { w_arg, NULL, prio, sseu }; return w_args; } @@ -2807,7 +2838,8 @@ int main(int argc, char **argv) init_clocks(); - while ((c = getopt(argc, argv, "hqv2RSHxGdc:n:r:w:W:a:t:b:p:")) != -1) { + while ((c = getopt(argc, argv, + "hqv2RsSHxGdc:n:r:w:W:a:t:b:p:")) != -1) { switch (c) { case 'W': if (master_workload >= 0) { @@ -2817,7 +2849,8 @@ int main(int argc, char **argv) master_workload = nr_w_args; /* Fall through */ case 'w': - w_args = add_workload_arg(w_args, ++nr_w_args, optarg, prio); + w_args = add_workload_arg(w_args, ++nr_w_args, optarg, + prio, flags & SSEU); break; case 'p': prio = atoi(optarg); @@ -2859,6 +2892,9 @@ int main(int argc, char **argv) case 'S': flags |= SYNCEDCLIENTS; break; + case 's': + flags ^= SSEU; + break; case 'H': flags |= HEARTBEAT; break;