From patchwork Fri May 17 11:25:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10947843 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6814A1398 for ; Fri, 17 May 2019 11:26:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5774C2675C for ; Fri, 17 May 2019 11:26:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4BF2C271CB; Fri, 17 May 2019 11:26:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,HK_RANDOM_FROM, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DB0F82675C for ; Fri, 17 May 2019 11:26:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7FB3689973; Fri, 17 May 2019 11:26:05 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5EBFF899B0; Fri, 17 May 2019 11:26:00 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 May 2019 04:26:00 -0700 X-ExtLoop1: 1 Received: from kmarenda-mobl2.ger.corp.intel.com (HELO localhost.localdomain) ([10.252.11.159]) by fmsmga005.fm.intel.com with ESMTP; 17 May 2019 04:25:59 -0700 From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org Date: Fri, 17 May 2019 12:25:25 +0100 Message-Id: <20190517112526.6738-25-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com> References: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 24/25] gem_wsim: Discover engines X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Instead of hardcoding the VCS balancing engines, discover, both with the new engines query, or with the legacy get_param in the fallback case, so class based addressing always works. Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 180 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 173 insertions(+), 7 deletions(-) diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c index d43e7c767801..539de243f6e8 100644 --- a/benchmarks/gem_wsim.c +++ b/benchmarks/gem_wsim.c @@ -365,34 +365,198 @@ static int str_to_engine(const char *str) return -1; } +static bool __engines_queried; +static unsigned int __num_engines; +static struct i915_engine_class_instance *__engines; + +static int +__i915_query(int i915, struct drm_i915_query *q) +{ + if (igt_ioctl(i915, DRM_IOCTL_I915_QUERY, q)) + return -errno; + return 0; +} + +static int +__i915_query_items(int i915, struct drm_i915_query_item *items, uint32_t n_items) +{ + struct drm_i915_query q = { + .num_items = n_items, + .items_ptr = to_user_pointer(items), + }; + return __i915_query(i915, &q); +} + +static void +i915_query_items(int i915, struct drm_i915_query_item *items, uint32_t n_items) +{ + igt_assert_eq(__i915_query_items(i915, items, n_items), 0); +} + +static bool has_query(int i915) +{ + struct drm_i915_query query = {}; + + return __i915_query(i915, &query) == 0; +} + +static bool has_engine_query(int i915) +{ + struct drm_i915_query_item item = { + .query_id = DRM_I915_QUERY_ENGINE_INFO, + }; + + return __i915_query_items(i915, &item, 1) == 0 && item.length > 0; +} + +static void query_engines(void) +{ + struct i915_engine_class_instance *engines; + unsigned int num; + + if (__engines_queried) + return; + + __engines_queried = true; + + if (!has_query(fd) || !has_engine_query(fd)) { + unsigned int num_bsd = gem_has_bsd(fd) + gem_has_bsd2(fd); + unsigned int i = 0; + + igt_assert(num); + + num = 1 + num_bsd; + + if (gem_has_blt(fd)) + num++; + + if (gem_has_vebox(fd)) + num++; + + engines = calloc(num, + sizeof(struct i915_engine_class_instance)); + igt_assert(engines); + + engines[i].engine_class = I915_ENGINE_CLASS_RENDER; + engines[i].engine_instance = 0; + i++; + + if (gem_has_blt(fd)) { + engines[i].engine_class = I915_ENGINE_CLASS_COPY; + engines[i].engine_instance = 0; + i++; + } + + if (gem_has_bsd(fd)) { + engines[i].engine_class = I915_ENGINE_CLASS_VIDEO; + engines[i].engine_instance = 0; + i++; + } + + if (gem_has_bsd2(fd)) { + engines[i].engine_class = I915_ENGINE_CLASS_VIDEO; + engines[i].engine_instance = 1; + i++; + } + + if (gem_has_vebox(fd)) { + engines[i].engine_class = + I915_ENGINE_CLASS_VIDEO_ENHANCE; + engines[i].engine_instance = 0; + i++; + } + } else { + struct drm_i915_query_engine_info *engine_info; + struct drm_i915_query_item item = { + .query_id = DRM_I915_QUERY_ENGINE_INFO, + }; + const unsigned int sz = 4096; + unsigned int i; + + engine_info = malloc(sz); + igt_assert(engine_info); + memset(engine_info, 0, sz); + + item.data_ptr = to_user_pointer(engine_info); + item.length = sz; + + i915_query_items(fd, &item, 1); + igt_assert(item.length > 0); + igt_assert(item.length <= sz); + + num = engine_info->num_engines; + + engines = calloc(num, + sizeof(struct i915_engine_class_instance)); + igt_assert(engines); + + for (i = 0; i < num; i++) { + struct drm_i915_engine_info *engine = + (struct drm_i915_engine_info *)&engine_info->engines[i]; + + engines[i] = engine->engine; + } + } + + __engines = engines; + __num_engines = num; +} + static unsigned int num_engines_in_class(enum intel_engine_id class) { + unsigned int i, count = 0; + igt_assert(class == VCS); - return 2; + query_engines(); + + for (i = 0; i < __num_engines; i++) { + if (__engines[i].engine_class == I915_ENGINE_CLASS_VIDEO) + count++; + } + + igt_assert(count); + return count; } static void fill_engines_class(struct i915_engine_class_instance *ci, enum intel_engine_id class) { + unsigned int i, j = 0; + igt_assert(class == VCS); - ci[0].engine_class = I915_ENGINE_CLASS_VIDEO; - ci[0].engine_instance = 0; + query_engines(); - ci[1].engine_class = I915_ENGINE_CLASS_VIDEO; - ci[1].engine_instance = 1; + for (i = 0; i < __num_engines; i++) { + if (__engines[i].engine_class != I915_ENGINE_CLASS_VIDEO) + continue; + + ci[j].engine_class = __engines[i].engine_class; + ci[j].engine_instance = __engines[i].engine_instance; + j++; + } } static void fill_engines_id_class(enum intel_engine_id *list, enum intel_engine_id class) { + enum intel_engine_id engine = VCS1; + unsigned int i, j = 0; + igt_assert(class == VCS); + igt_assert(num_engines_in_class(VCS) <= 2); + + query_engines(); - list[0] = VCS1; - list[1] = VCS2; + for (i = 0; i < __num_engines; i++) { + if (__engines[i].engine_class != I915_ENGINE_CLASS_VIDEO) + continue; + + list[j++] = engine++; + } } static struct i915_engine_class_instance @@ -400,6 +564,8 @@ get_engine(enum intel_engine_id engine) { struct i915_engine_class_instance ci; + query_engines(); + switch (engine) { case RCS: ci.engine_class = I915_ENGINE_CLASS_RENDER;