[i-g-t,02/25] trace.pl: Ignore signaling on non i915 fences

Message ID	20190517112526.6738-3-tvrtko.ursulin@linux.intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> To: igt-dev@lists.freedesktop.org Date: Fri, 17 May 2019 12:25:03 +0100 Message-Id: <20190517112526.6738-3-tvrtko.ursulin@linux.intel.com> In-Reply-To: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com> References: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 02/25] trace.pl: Ignore signaling on non i915 fences Precedence: list Cc: Intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
Series	Media scalability tooling \| expand [i-g-t,00/25] Media scalability tooling [i-g-t,01/25] scripts/trace.pl: Fix after intel_engine_notify removal [i-g-t,02/25] trace.pl: Ignore signaling on non i915 fences [i-g-t,03/25] headers: bump [i-g-t,04/25] trace.pl: Virtual engine support [i-g-t,05/25] trace.pl: Virtual engine preemption support [i-g-t,06/25] wsim/media-bench: i915 balancing [i-g-t,07/25] gem_wsim: Use IGT uapi headers [i-g-t,08/25] gem_wsim: Factor out common error handling [i-g-t,09/25] gem_wsim: More wsim_err [i-g-t,10/25] gem_wsim: Submit fence support [i-g-t,11/25] gem_wsim: Extract str to engine lookup [i-g-t,12/25] gem_wsim: Engine map support [i-g-t,13/25] gem_wsim: Save some lines by changing to implicit NULL checking [i-g-t,14/25] gem_wsim: Compact int command parsing with a macro [i-g-t,15/25] gem_wsim: Engine map load balance command [i-g-t,16/25] gem_wsim: Engine bond command [i-g-t,17/25] gem_wsim: Some more example workloads [i-g-t,18/25] gem_wsim: Infinite batch support [i-g-t,19/25] gem_wsim: Command line switch for specifying low slice count workloads [i-g-t,20/25] gem_wsim: Per context SSEU control [i-g-t,21/25] gem_wsim: Allow RCS virtual engine with SSEU control [i-g-t,22/25] tests/i915_query: Engine discovery tests [i-g-t,23/25] gem_wsim: Consolidate engine assignments into helpers [i-g-t,24/25] gem_wsim: Discover engines [i-g-t,25/25] gem_wsim: Support Icelake parts

Message ID

20190517112526.6738-3-tvrtko.ursulin@linux.intel.com (mailing list archive)

State

New, archived

Headers

From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: igt-dev@lists.freedesktop.org
Date: Fri, 17 May 2019 12:25:03 +0100
Message-Id: <20190517112526.6738-3-tvrtko.ursulin@linux.intel.com>
In-Reply-To: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com>
References: <20190517112526.6738-1-tvrtko.ursulin@linux.intel.com>
MIME-Version: 1.0
Subject: [Intel-gfx] [PATCH i-g-t 02/25] trace.pl: Ignore signaling on non
 i915 fences
Precedence: list
Cc: Intel-gfx@lists.freedesktop.org
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Series

Media scalability tooling | expand

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> gem_wsim uses the sw_fence timeline and confuses the script. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- scripts/trace.pl | 1 + 1 file changed, 1 insertion(+)

Comments

Chris Wilson May 17, 2019, 7:20 p.m. UTC | #1

Quoting Tvrtko Ursulin (2019-05-17 12:25:03)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> gem_wsim uses the sw_fence timeline and confuses the script.

sw_sync

How does this fare with clflush fences (which are .driver="i915") and
all of the future .driver="i915" fences?

Looks like we are still prone to hitting that die. (Should die pretty
quick on !llc)
-Chris

Tvrtko Ursulin May 20, 2019, 10:30 a.m. UTC | #2

On 17/05/2019 20:20, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-05-17 12:25:03)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> gem_wsim uses the sw_fence timeline and confuses the script.
> 
> sw_sync
> 
> How does this fare with clflush fences (which are .driver="i915") and
> all of the future .driver="i915" fences?
> 
> Looks like we are still prone to hitting that die. (Should die pretty
> quick on !llc)

Okay I have to use the timeline name as well, thanks!

Regards,

Tvrtko

diff --git a/scripts/trace.pl b/scripts/trace.pl
index b7bbabc79f68..930e502ad8eb 100755
--- a/scripts/trace.pl
+++ b/scripts/trace.pl
@@ -439,6 +439,7 @@  while (<>) {
 	} elsif ($tp_name eq 'dma_fence:dma_fence_signaled:') {
 		my $gkey;
 
+		next unless $tp{'driver'} eq 'i915';
 		die unless exists $ctxengines{$tp{'context'}};
 
 		$gkey = db_key($ctxengines{$tp{'context'}}, $tp{'context'}, $tp{'seqno'});

[i-g-t,02/25] trace.pl: Ignore signaling on non i915 fences

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Comments

Patch