From patchwork Thu May 23 08:24:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 10957081 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E9CD51395 for ; Thu, 23 May 2019 08:24:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C333C2839C for ; Thu, 23 May 2019 08:24:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B8238283A8; Thu, 23 May 2019 08:24:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 57017283AF for ; Thu, 23 May 2019 08:24:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7053189CE3; Thu, 23 May 2019 08:24:36 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id CC69289CDB for ; Thu, 23 May 2019 08:24:28 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 May 2019 01:24:28 -0700 X-ExtLoop1: 1 Received: from igivoni-mobl.amr.corp.intel.com (HELO ldmartin-desk.amr.corp.intel.com) ([10.255.88.102]) by orsmga001.jf.intel.com with ESMTP; 23 May 2019 01:24:28 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Thu, 23 May 2019 01:24:16 -0700 Message-Id: <20190523082420.10352-6-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190523082420.10352-1-lucas.demarchi@intel.com> References: <20190523082420.10352-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 06/10] drm/i915/dmc: extract function to parse dmc_header X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Complete the extraction of functions to parse specific parts of the firmware. The return of the function parse_csr_fw() is now redundant since it already sets the dmc_payload field. Changing it is left for later to avoid noise in the commit. Signed-off-by: Lucas De Marchi Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_csr.c | 102 ++++++++++++++++++------------- 1 file changed, 60 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index b19742becb98..20dd4bd5feae 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -332,6 +332,61 @@ static u32 find_dmc_fw_offset(const struct intel_fw_info *fw_info, return dmc_offset; } +static u32 parse_csr_fw_dmc(struct intel_csr *csr, + const struct intel_dmc_header *dmc_header) +{ + unsigned int i, payload_size; + u32 r; + u8 *payload; + + if (sizeof(struct intel_dmc_header) != dmc_header->header_len) { + DRM_ERROR("DMC firmware has wrong dmc header length " + "(%u bytes)\n", + (dmc_header->header_len)); + return 0; + } + + /* Cache the dmc header info. */ + if (dmc_header->mmio_count > ARRAY_SIZE(csr->mmioaddr)) { + DRM_ERROR("DMC firmware has wrong mmio count %u\n", + dmc_header->mmio_count); + return 0; + } + + csr->mmio_count = dmc_header->mmio_count; + for (i = 0; i < dmc_header->mmio_count; i++) { + if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE || + dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) { + DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n", + dmc_header->mmioaddr[i]); + return 0; + } + csr->mmioaddr[i] = _MMIO(dmc_header->mmioaddr[i]); + csr->mmiodata[i] = dmc_header->mmiodata[i]; + } + + /* fw_size is in dwords, so multiplied by 4 to convert into bytes. */ + payload_size = dmc_header->fw_size * 4; + if (payload_size > csr->max_fw_size) { + DRM_ERROR("DMC FW too big (%u bytes)\n", payload_size); + return 0; + } + csr->dmc_fw_size = dmc_header->fw_size; + + csr->dmc_payload = kmalloc(payload_size, GFP_KERNEL); + if (!csr->dmc_payload) { + DRM_ERROR("Memory allocation failed for dmc payload\n"); + return 0; + } + + r = sizeof(struct intel_dmc_header); + payload = (u8 *)(dmc_header) + r; + memcpy(csr->dmc_payload, payload, payload_size); + r += payload_size; + + return r; +} + static u32 parse_csr_fw_package(struct intel_csr *csr, const struct intel_package_header *package_header, @@ -418,9 +473,8 @@ static u32 *parse_csr_fw(struct drm_i915_private *dev_priv, struct intel_dmc_header *dmc_header; struct intel_csr *csr = &dev_priv->csr; const struct stepping_info *si = intel_get_stepping_info(dev_priv); - u32 readcount = 0, nbytes; - u32 i, r; - u32 *dmc_payload; + u32 readcount = 0; + u32 r; if (!fw) return NULL; @@ -443,47 +497,11 @@ static u32 *parse_csr_fw(struct drm_i915_private *dev_priv, /* Extract dmc_header information. */ dmc_header = (struct intel_dmc_header *)&fw->data[readcount]; - if (sizeof(struct intel_dmc_header) != (dmc_header->header_len)) { - DRM_ERROR("DMC firmware has wrong dmc header length " - "(%u bytes)\n", - (dmc_header->header_len)); - return NULL; - } - readcount += sizeof(struct intel_dmc_header); - - /* Cache the dmc header info. */ - if (dmc_header->mmio_count > ARRAY_SIZE(csr->mmioaddr)) { - DRM_ERROR("DMC firmware has wrong mmio count %u\n", - dmc_header->mmio_count); - return NULL; - } - csr->mmio_count = dmc_header->mmio_count; - for (i = 0; i < dmc_header->mmio_count; i++) { - if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE || - dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) { - DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n", - dmc_header->mmioaddr[i]); - return NULL; - } - csr->mmioaddr[i] = _MMIO(dmc_header->mmioaddr[i]); - csr->mmiodata[i] = dmc_header->mmiodata[i]; - } - - /* fw_size is in dwords, so multiplied by 4 to convert into bytes. */ - nbytes = dmc_header->fw_size * 4; - if (nbytes > csr->max_fw_size) { - DRM_ERROR("DMC FW too big (%u bytes)\n", nbytes); - return NULL; - } - csr->dmc_fw_size = dmc_header->fw_size; - - dmc_payload = kmalloc(nbytes, GFP_KERNEL); - if (!dmc_payload) { - DRM_ERROR("Memory allocation failed for dmc payload\n"); + r = parse_csr_fw_dmc(csr, dmc_header); + if (!r) return NULL; - } - return memcpy(dmc_payload, &fw->data[readcount], nbytes); + return csr->dmc_payload; } static void intel_csr_runtime_pm_get(struct drm_i915_private *dev_priv)