| Message ID | 20190525070525.22770-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [i-g-t] i915/gem_workarounds: Verify regs directly | expand |
On Sat, 25 May 2019 at 08:05, Chris Wilson <chris@chris-wilson.co.uk> wrote: > > --- Reviewed-by: Matthew Auld <matthew.auld@intel.com> > tests/i915/gem_workarounds.c | 45 +++++++++++++++++++++++++++++------- > 1 file changed, 37 insertions(+), 8 deletions(-) > > diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c > index 44e3dce8a..bf8b4f630 100644 > --- a/tests/i915/gem_workarounds.c > +++ b/tests/i915/gem_workarounds.c > @@ -82,6 +82,7 @@ static bool write_only(const uint32_t addr) > > #define MI_STORE_REGISTER_MEM (0x24 << 23) > > +#if 0 > static int workaround_fail_count(int fd, uint32_t ctx) > { > struct drm_i915_gem_exec_object2 obj[2]; > @@ -162,17 +163,45 @@ static int workaround_fail_count(int fd, uint32_t ctx) > > return fail_count; > } > - > -static int reopen(int fd) > +#else > +static int workaround_fail_count(int i915, uint32_t ctx) > { > - char path[256]; > + igt_spin_t *spin; > + int fail = 0; > + > + intel_mmio_use_pci_bar(intel_get_pci_device()); > + > + spin = igt_spin_new(i915, .ctx = ctx, .flags = IGT_SPIN_POLL_RUN); > + igt_spin_busywait_until_started(spin); > + > + for (int i = 0; i < num_wa_regs; i++) { > + uint32_t value = > + *(uint32_t *)(igt_global_mmio + wa_regs[i].addr); > + const bool ok = > + (wa_regs[i].value & wa_regs[i].mask) == > + (value & wa_regs[i].mask); > + char buf[80]; > + > + snprintf(buf, sizeof(buf), > + "0x%05X\t0x%08X\t0x%08X\t0x%08X", > + wa_regs[i].addr, wa_regs[i].value, wa_regs[i].mask, > + value); > + > + if (ok) { > + igt_debug("%s\tOK\n", buf); > + } else if (write_only(wa_regs[i].addr)) { > + igt_debug("%s\tIGNORED (w/o)\n", buf); > + } else { > + igt_warn("%s\tFAIL\n", buf); > + fail++; > + } > + } > > - snprintf(path, sizeof(path), "/proc/self/fd/%d", fd); > - fd = open(path, O_RDWR); > - igt_assert_lte(0, fd); > + igt_spin_free(i915, spin); > > - return fd; > + return fail; > } > +#endif > > #define CONTEXT 0x1 > #define FD 0x2 > @@ -181,7 +210,7 @@ static void check_workarounds(int fd, enum operation op, unsigned int flags) > uint32_t ctx = 0; > > if (flags & FD) > - fd = reopen(fd); > + fd = gem_reopen_driver(fd); > > if (flags & CONTEXT) { > gem_require_contexts(fd); > -- > 2.20.1 > > _______________________________________________ > igt-dev mailing list > igt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/igt-dev
diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c index 44e3dce8a..bf8b4f630 100644 --- a/tests/i915/gem_workarounds.c +++ b/tests/i915/gem_workarounds.c @@ -82,6 +82,7 @@ static bool write_only(const uint32_t addr) #define MI_STORE_REGISTER_MEM (0x24 << 23) +#if 0 static int workaround_fail_count(int fd, uint32_t ctx) { struct drm_i915_gem_exec_object2 obj[2]; @@ -162,17 +163,45 @@ static int workaround_fail_count(int fd, uint32_t ctx) return fail_count; } - -static int reopen(int fd) +#else +static int workaround_fail_count(int i915, uint32_t ctx) { - char path[256]; + igt_spin_t *spin; + int fail = 0; + + intel_mmio_use_pci_bar(intel_get_pci_device()); + + spin = igt_spin_new(i915, .ctx = ctx, .flags = IGT_SPIN_POLL_RUN); + igt_spin_busywait_until_started(spin); + + for (int i = 0; i < num_wa_regs; i++) { + uint32_t value = + *(uint32_t *)(igt_global_mmio + wa_regs[i].addr); + const bool ok = + (wa_regs[i].value & wa_regs[i].mask) == + (value & wa_regs[i].mask); + char buf[80]; + + snprintf(buf, sizeof(buf), + "0x%05X\t0x%08X\t0x%08X\t0x%08X", + wa_regs[i].addr, wa_regs[i].value, wa_regs[i].mask, + value); + + if (ok) { + igt_debug("%s\tOK\n", buf); + } else if (write_only(wa_regs[i].addr)) { + igt_debug("%s\tIGNORED (w/o)\n", buf); + } else { + igt_warn("%s\tFAIL\n", buf); + fail++; + } + } - snprintf(path, sizeof(path), "/proc/self/fd/%d", fd); - fd = open(path, O_RDWR); - igt_assert_lte(0, fd); + igt_spin_free(i915, spin); - return fd; + return fail; } +#endif #define CONTEXT 0x1 #define FD 0x2 @@ -181,7 +210,7 @@ static void check_workarounds(int fd, enum operation op, unsigned int flags) uint32_t ctx = 0; if (flags & FD) - fd = reopen(fd); + fd = gem_reopen_driver(fd); if (flags & CONTEXT) { gem_require_contexts(fd);