From patchwork Fri Jun 7 09:12:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 10981127 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2453215E6 for ; Fri, 7 Jun 2019 09:12:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 147AE28B26 for ; Fri, 7 Jun 2019 09:12:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0917728B21; Fri, 7 Jun 2019 09:12:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A661228B25 for ; Fri, 7 Jun 2019 09:12:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E8D189CF6; Fri, 7 Jun 2019 09:12:54 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id CB90189CE3 for ; Fri, 7 Jun 2019 09:12:48 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Jun 2019 02:12:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,562,1557212400"; d="scan'208";a="182609343" Received: from kseeloff-mobl1.amr.corp.intel.com (HELO ldmartin-desk.fios-router.home) ([10.254.23.10]) by fmsmga002.fm.intel.com with ESMTP; 07 Jun 2019 02:12:47 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Fri, 7 Jun 2019 02:12:24 -0700 Message-Id: <20190607091230.1489-4-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190607091230.1489-1-lucas.demarchi@intel.com> References: <20190607091230.1489-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/9] drm/i915/dmc: add support for package_header with version 2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The only meaninful change is that it supports up to 32 fw_info entries rather than the previous max=20. Signed-off-by: Lucas De Marchi Reviewed-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_csr.c | 38 ++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index 99fa4db95e46..ba72c29acbcc 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -71,6 +71,7 @@ MODULE_FIRMWARE(BXT_CSR_PATH); #define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF #define PACKAGE_MAX_FW_INFO_ENTRIES 20 +#define PACKAGE_V2_MAX_FW_INFO_ENTRIES 32 struct intel_css_header { /* 0x09 for DMC */ @@ -133,7 +134,7 @@ struct intel_package_header { /* DMC container header length in dwords */ u8 header_len; - /* always value would be 0x01 */ + /* 0x01, 0x02 */ u8 header_ver; u8 reserved[10]; @@ -339,7 +340,7 @@ static u32 *parse_csr_fw(struct drm_i915_private *dev_priv, struct intel_dmc_header *dmc_header; struct intel_csr *csr = &dev_priv->csr; const struct stepping_info *si = intel_get_stepping_info(dev_priv); - u32 dmc_offset, num_entries, readcount = 0, nbytes; + u32 dmc_offset, num_entries, max_entries, readcount = 0, nbytes; u32 i; u32 *dmc_payload; size_t fsize; @@ -381,20 +382,32 @@ static u32 *parse_csr_fw(struct drm_i915_private *dev_priv, /* Extract Package Header information*/ package_header = (struct intel_package_header *) &fw->data[readcount]; - if (sizeof(struct intel_package_header) != - (package_header->header_len * 4)) { + + readcount += sizeof(struct intel_package_header); + + if (package_header->header_ver == 1) { + max_entries = PACKAGE_MAX_FW_INFO_ENTRIES; + } else if (package_header->header_ver == 2) { + max_entries = PACKAGE_V2_MAX_FW_INFO_ENTRIES; + } else { + DRM_ERROR("DMC firmware has unknown header version %u\n", + package_header->header_ver); + return NULL; + } + + if (package_header->header_len * 4 != + sizeof(struct intel_package_header) + + max_entries * sizeof(struct intel_fw_info)) { DRM_ERROR("DMC firmware has wrong package header length " - "(%u bytes)\n", - (package_header->header_len * 4)); + "(%u bytes)\n", package_header->header_len * 4); return NULL; } - readcount += sizeof(struct intel_package_header); num_entries = package_header->num_entries; - if (WARN_ON(package_header->num_entries > PACKAGE_MAX_FW_INFO_ENTRIES)) - num_entries = PACKAGE_MAX_FW_INFO_ENTRIES; + if (WARN_ON(package_header->num_entries > max_entries)) + num_entries = max_entries; - fsize += PACKAGE_MAX_FW_INFO_ENTRIES * sizeof(struct intel_fw_info); + fsize += max_entries * sizeof(struct intel_fw_info); if (fsize > fw->size) goto error_truncated; @@ -405,8 +418,9 @@ static u32 *parse_csr_fw(struct drm_i915_private *dev_priv, si->stepping); return NULL; } - /* we always have space for PACKAGE_MAX_FW_INFO_ENTRIES */ - readcount += PACKAGE_MAX_FW_INFO_ENTRIES * sizeof(struct intel_fw_info); + + /* we always have space for max_entries, even if not all are used */ + readcount += max_entries * sizeof(struct intel_fw_info); /* Convert dmc_offset into number of bytes. By default it is in dwords*/ dmc_offset *= 4;