From patchwork Tue Jun 11 17:27:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 10987941 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CF92914BB for ; Tue, 11 Jun 2019 17:27:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B010F26E1A for ; Tue, 11 Jun 2019 17:27:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A4977287B1; Tue, 11 Jun 2019 17:27:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 546A126E1A for ; Tue, 11 Jun 2019 17:27:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6216F89220; Tue, 11 Jun 2019 17:27:37 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 89852891D4 for ; Tue, 11 Jun 2019 17:27:36 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jun 2019 10:27:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,362,1557212400"; d="scan'208";a="183872738" Received: from rosetta.fi.intel.com ([10.237.72.186]) by fmsmga002.fm.intel.com with ESMTP; 11 Jun 2019 10:27:35 -0700 Received: by rosetta.fi.intel.com (Postfix, from userid 1000) id 3762684064E; Tue, 11 Jun 2019 20:27:33 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Tue, 11 Jun 2019 20:27:29 +0300 Message-Id: <20190611172731.19174-7-mika.kuoppala@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190611172731.19174-1-mika.kuoppala@linux.intel.com> References: <20190611172731.19174-1-mika.kuoppala@linux.intel.com> Subject: [Intel-gfx] [PATCH 7/9] drm/i915/gtt: Check for physical page for pd entry always X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Check the physical page before writing the entry into the physical page. This further generalizes the pd so that manipulation in callsites will be identical, removing the need to handle pdps differently for gen8. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gem_gtt.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 815950658b12..f1d7874834e2 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -747,17 +747,11 @@ static void __set_pd_entry(struct i915_page_directory * const pd, #define set_pd_entry(pd, pde, to) ({ \ (pd)->entry[(pde)] = (to); \ - __set_pd_entry((pd), (pde), \ + if (likely(pd_has_phys_page(pd))) \ + __set_pd_entry((pd), (pde), \ gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ }) -#define set_pdp_entry(pdp, pdpe, to) ({ \ - (pdp)->entry[(pdpe)] = (to); \ - if (pd_has_phys_page(pdp)) \ - __set_pd_entry((pdp), (pdpe), \ - gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ -}) - /* * PDE TLBs are a pain to invalidate on GEN8+. When we modify * the page table structures, we mark them dirty so that @@ -838,7 +832,7 @@ static bool gen8_ppgtt_clear_pdp(struct i915_address_space *vm, spin_lock(&pdp->lock); if (!atomic_read(&pd->used)) { - set_pdp_entry(pdp, pdpe, vm->scratch_pd); + set_pd_entry(pdp, pdpe, vm->scratch_pd); GEM_BUG_ON(!atomic_read(&pdp->used)); atomic_dec(&pdp->used); @@ -1379,7 +1373,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm, old = cmpxchg(&pdp->entry[pdpe], vm->scratch_pd, pd); if (old == vm->scratch_pd) { - set_pdp_entry(pdp, pdpe, pd); + set_pd_entry(pdp, pdpe, pd); atomic_inc(&pdp->used); } else { free_pd(vm, pd); @@ -1405,7 +1399,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm, unwind_pd: spin_lock(&pdp->lock); if (atomic_dec_and_test(&pd->used)) { - set_pdp_entry(pdp, pdpe, vm->scratch_pd); + set_pd_entry(pdp, pdpe, vm->scratch_pd); GEM_BUG_ON(!atomic_read(&pdp->used)); atomic_dec(&pdp->used); free_pd(vm, pd); @@ -1497,7 +1491,7 @@ static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt) goto unwind; init_pd(vm, pd, vm->scratch_pt); - set_pdp_entry(pdp, pdpe, pd); + set_pd_entry(pdp, pdpe, pd); atomic_inc(&pdp->used); } @@ -1509,7 +1503,7 @@ static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt) unwind: start -= from; gen8_for_each_pdpe(pd, pdp, from, start, pdpe) { - set_pdp_entry(pdp, pdpe, vm->scratch_pd); + set_pd_entry(pdp, pdpe, vm->scratch_pd); free_pd(vm, pd); } atomic_set(&pdp->used, 0);