From patchwork Wed Jun 26 06:53:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 11017043 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ACB721398 for ; Wed, 26 Jun 2019 06:55:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A59D284F5 for ; Wed, 26 Jun 2019 06:55:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8C0B928607; Wed, 26 Jun 2019 06:55:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3BFD1284F5 for ; Wed, 26 Jun 2019 06:55:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CFAA36E299; Wed, 26 Jun 2019 06:54:59 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id EB83B6E299 for ; Wed, 26 Jun 2019 06:54:58 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 17026090-1500050 for multiple; Wed, 26 Jun 2019 07:53:08 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Wed, 26 Jun 2019 07:53:00 +0100 Message-Id: <20190626065303.31624-3-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190626065303.31624-1-chris@chris-wilson.co.uk> References: <20190626065303.31624-1-chris@chris-wilson.co.uk> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/6] drm/i915/selftests: Fixup atomic reset checking X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP We require that the intel_gpu_reset() was atomic, not the whole of i915_reset() which is guarded by a mutex. However, we do require that i915_reset_engine() is atomic for use from within the submission tasklet. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/selftest_reset.c | 65 +++++++++++++++++++++++- 1 file changed, 63 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c index 64c2c8ab64ec..641cf3aee8d5 100644 --- a/drivers/gpu/drm/i915/gt/selftest_reset.c +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c @@ -73,11 +73,13 @@ static int igt_atomic_reset(void *arg) for (p = igt_atomic_phases; p->name; p++) { GEM_TRACE("intel_gpu_reset under %s\n", p->name); - p->critical_section_begin(); reset_prepare(i915); + p->critical_section_begin(); + err = intel_gpu_reset(i915, ALL_ENGINES); - reset_finish(i915); + p->critical_section_end(); + reset_finish(i915); if (err) { pr_err("intel_gpu_reset failed under %s\n", p->name); @@ -95,12 +97,71 @@ static int igt_atomic_reset(void *arg) return err; } +static int igt_atomic_engine_reset(void *arg) +{ + struct drm_i915_private *i915 = arg; + const typeof(*igt_atomic_phases) *p; + struct intel_engine_cs *engine; + enum intel_engine_id id; + int err = 0; + + /* Check that the resets are usable from atomic context */ + + if (!intel_has_reset_engine(i915)) + return 0; + + if (USES_GUC_SUBMISSION(i915)) + return 0; + + intel_gt_pm_get(&i915->gt); + igt_global_reset_lock(i915); + + /* Flush any requests before we get started and check basics */ + if (!igt_force_reset(i915)) + goto out_unlock; + + for_each_engine(engine, i915, id) { + tasklet_disable_nosync(&engine->execlists.tasklet); + intel_engine_pm_get(engine); + + for (p = igt_atomic_phases; p->name; p++) { + GEM_TRACE("i915_reset_engine(%s) under %s\n", + engine->name, p->name); + + p->critical_section_begin(); + err = i915_reset_engine(engine, NULL); + p->critical_section_end(); + + if (err) { + pr_err("i915_reset_engine(%s) failed under %s\n", + engine->name, p->name); + break; + } + } + + intel_engine_pm_put(engine); + tasklet_enable(&engine->execlists.tasklet); + if (err) + break; + } + + /* As we poke around the guts, do a full reset before continuing. */ + igt_force_reset(i915); + +out_unlock: + igt_global_reset_unlock(i915); + intel_gt_pm_put(&i915->gt); + + return err; +} + int intel_reset_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { SUBTEST(igt_global_reset), /* attempt to recover GPU first */ SUBTEST(igt_wedged_reset), SUBTEST(igt_atomic_reset), + SUBTEST(igt_atomic_engine_reset), }; intel_wakeref_t wakeref; int err = 0;