diff mbox series

[02/11] drm/i915/uc: replace uc init/fini misc

Message ID 20190713100016.8026-2-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [01/11] drm/i915/guc: Use system workqueue for log capture | expand

Commit Message

Chris Wilson July 13, 2019, 10 a.m. UTC
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

The "misc" terminology doesn't clearly explain what we intend to cover
in this phase. The only thing we do in there apart from FW fetch is
initializing the log workqueue, with the latter being required only in
the very rare case where we enable the log relay. To clean this up, we
can move the wq init to when the relay is enabled and rename the
function to clarify that they only fetch/release the blobs.

v2: only create log wq when needed (Michal), reword commit msg
accordingly

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c  | 12 +++++------
 drivers/gpu/drm/i915/intel_guc.c | 14 -------------
 drivers/gpu/drm/i915/intel_guc.h |  2 --
 drivers/gpu/drm/i915/intel_huc.c |  8 --------
 drivers/gpu/drm/i915/intel_huc.h |  6 ------
 drivers/gpu/drm/i915/intel_uc.c  | 34 ++++++++------------------------
 drivers/gpu/drm/i915/intel_uc.h  |  4 ++--
 7 files changed, 15 insertions(+), 65 deletions(-)

Comments

Chris Wilson July 13, 2019, 10:16 a.m. UTC | #1
Quoting Chris Wilson (2019-07-13 11:00:07)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> The "misc" terminology doesn't clearly explain what we intend to cover
> in this phase. The only thing we do in there apart from FW fetch is
> initializing the log workqueue, with the latter being required only in
> the very rare case where we enable the log relay. To clean this up, we
> can move the wq init to when the relay is enabled and rename the
> function to clarify that they only fetch/release the blobs.
> 
> v2: only create log wq when needed (Michal), reword commit msg
> accordingly
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
Michal Wajdeczko July 13, 2019, 5:32 p.m. UTC | #2
On Sat, 13 Jul 2019 12:00:07 +0200, Chris Wilson  
<chris@chris-wilson.co.uk> wrote:

> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>
> The "misc" terminology doesn't clearly explain what we intend to cover
> in this phase. The only thing we do in there apart from FW fetch is
> initializing the log workqueue, with the latter being required only in
> the very rare case where we enable the log relay. To clean this up, we
> can move the wq init to when the relay is enabled and rename the
> function to clarify that they only fetch/release the blobs.
>
> v2: only create log wq when needed (Michal), reword commit msg
> accordingly
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---

Commit message needs fixup, as now wq is already gone; with that,

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>


>  drivers/gpu/drm/i915/i915_gem.c  | 12 +++++------
>  drivers/gpu/drm/i915/intel_guc.c | 14 -------------
>  drivers/gpu/drm/i915/intel_guc.h |  2 --
>  drivers/gpu/drm/i915/intel_huc.c |  8 --------
>  drivers/gpu/drm/i915/intel_huc.h |  6 ------
>  drivers/gpu/drm/i915/intel_uc.c  | 34 ++++++++------------------------
>  drivers/gpu/drm/i915/intel_uc.h  |  4 ++--
>  7 files changed, 15 insertions(+), 65 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c  
> b/drivers/gpu/drm/i915/i915_gem.c
> index e24955b5ebc2..f62dbd8c86de 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1433,13 +1433,11 @@ int i915_gem_init(struct drm_i915_private  
> *dev_priv)
>  	if (ret)
>  		return ret;
> -	ret = intel_uc_init_misc(dev_priv);
> -	if (ret)
> -		return ret;
> +	intel_uc_fetch_firmwares(dev_priv);
> 	ret = intel_wopcm_init(&dev_priv->wopcm);
>  	if (ret)
> -		goto err_uc_misc;
> +		goto err_uc_fw;
> 	/* This is just a security blanket to placate dragons.
>  	 * On some systems, we very sporadically observe that the first TLBs
> @@ -1565,8 +1563,8 @@ int i915_gem_init(struct drm_i915_private  
> *dev_priv)
>  	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
>  	mutex_unlock(&dev_priv->drm.struct_mutex);
> -err_uc_misc:
> -	intel_uc_fini_misc(dev_priv);
> +err_uc_fw:
> +	intel_uc_cleanup_firmwares(dev_priv);
> 	if (ret != -EIO) {
>  		i915_gem_cleanup_userptr(dev_priv);
> @@ -1632,7 +1630,7 @@ void i915_gem_driver_release(struct  
> drm_i915_private *dev_priv)
> 	intel_cleanup_gt_powersave(dev_priv);
> -	intel_uc_fini_misc(dev_priv);
> +	intel_uc_cleanup_firmwares(dev_priv);
>  	i915_gem_cleanup_userptr(dev_priv);
>  	intel_timelines_fini(dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_guc.c  
> b/drivers/gpu/drm/i915/intel_guc.c
> index 183ab9b03ed0..4173b35bf104 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -99,20 +99,6 @@ void intel_guc_init_early(struct intel_guc *guc)
>  	}
>  }
> -int intel_guc_init_misc(struct intel_guc *guc)
> -{
> -	struct drm_i915_private *i915 = guc_to_i915(guc);
> -
> -	intel_uc_fw_fetch(i915, &guc->fw);
> -
> -	return 0;
> -}
> -
> -void intel_guc_fini_misc(struct intel_guc *guc)
> -{
> -	intel_uc_fw_cleanup_fetch(&guc->fw);
> -}
> -
>  static int guc_shared_data_create(struct intel_guc *guc)
>  {
>  	struct i915_vma *vma;
> diff --git a/drivers/gpu/drm/i915/intel_guc.h  
> b/drivers/gpu/drm/i915/intel_guc.h
> index ec1038c1f50e..91d538fd5f65 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -153,10 +153,8 @@ static inline u32 intel_guc_ggtt_offset(struct  
> intel_guc *guc,
>  void intel_guc_init_early(struct intel_guc *guc);
>  void intel_guc_init_send_regs(struct intel_guc *guc);
>  void intel_guc_init_params(struct intel_guc *guc);
> -int intel_guc_init_misc(struct intel_guc *guc);
>  int intel_guc_init(struct intel_guc *guc);
>  void intel_guc_fini(struct intel_guc *guc);
> -void intel_guc_fini_misc(struct intel_guc *guc);
>  int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32  
> len,
>  		       u32 *response_buf, u32 response_buf_size);
>  int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32  
> len,
> diff --git a/drivers/gpu/drm/i915/intel_huc.c  
> b/drivers/gpu/drm/i915/intel_huc.c
> index fb6f693d3cac..2a41ee89a16d 100644
> --- a/drivers/gpu/drm/i915/intel_huc.c
> +++ b/drivers/gpu/drm/i915/intel_huc.c
> @@ -44,14 +44,6 @@ void intel_huc_init_early(struct intel_huc *huc)
>  	}
>  }
> -int intel_huc_init_misc(struct intel_huc *huc)
> -{
> -	struct drm_i915_private *i915 = huc_to_i915(huc);
> -
> -	intel_uc_fw_fetch(i915, &huc->fw);
> -	return 0;
> -}
> -
>  static int intel_huc_rsa_data_create(struct intel_huc *huc)
>  {
>  	struct drm_i915_private *i915 = huc_to_i915(huc);
> diff --git a/drivers/gpu/drm/i915/intel_huc.h  
> b/drivers/gpu/drm/i915/intel_huc.h
> index 2a6c94e79f17..9fa3d4629f2e 100644
> --- a/drivers/gpu/drm/i915/intel_huc.h
> +++ b/drivers/gpu/drm/i915/intel_huc.h
> @@ -45,17 +45,11 @@ struct intel_huc {
>  };
> void intel_huc_init_early(struct intel_huc *huc);
> -int intel_huc_init_misc(struct intel_huc *huc);
>  int intel_huc_init(struct intel_huc *huc);
>  void intel_huc_fini(struct intel_huc *huc);
>  int intel_huc_auth(struct intel_huc *huc);
>  int intel_huc_check_status(struct intel_huc *huc);
> -static inline void intel_huc_fini_misc(struct intel_huc *huc)
> -{
> -	intel_uc_fw_cleanup_fetch(&huc->fw);
> -}
> -
>  static inline int intel_huc_sanitize(struct intel_huc *huc)
>  {
>  	intel_uc_fw_sanitize(&huc->fw);
> diff --git a/drivers/gpu/drm/i915/intel_uc.c  
> b/drivers/gpu/drm/i915/intel_uc.c
> index bc589efd3a6d..00baaccc2f1c 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -349,44 +349,26 @@ static void guc_disable_communication(struct  
> intel_guc *guc)
>  	DRM_INFO("GuC communication disabled\n");
>  }
> -int intel_uc_init_misc(struct drm_i915_private *i915)
> +void intel_uc_fetch_firmwares(struct drm_i915_private *i915)
>  {
> -	struct intel_guc *guc = &i915->guc;
> -	struct intel_huc *huc = &i915->huc;
> -	int ret;
> -
>  	if (!USES_GUC(i915))
> -		return 0;
> -
> -	ret = intel_guc_init_misc(guc);
> -	if (ret)
> -		return ret;
> -
> -	if (USES_HUC(i915)) {
> -		ret = intel_huc_init_misc(huc);
> -		if (ret)
> -			goto err_guc;
> -	}
> +		return;
> -	return 0;
> +	intel_uc_fw_fetch(i915, &i915->guc.fw);
> -err_guc:
> -	intel_guc_fini_misc(guc);
> -	return ret;
> +	if (USES_HUC(i915))
> +		intel_uc_fw_fetch(i915, &i915->huc.fw);
>  }
> -void intel_uc_fini_misc(struct drm_i915_private *i915)
> +void intel_uc_cleanup_firmwares(struct drm_i915_private *i915)
>  {
> -	struct intel_guc *guc = &i915->guc;
> -	struct intel_huc *huc = &i915->huc;
> -
>  	if (!USES_GUC(i915))
>  		return;
> 	if (USES_HUC(i915))
> -		intel_huc_fini_misc(huc);
> +		intel_uc_fw_cleanup_fetch(&i915->huc.fw);
> -	intel_guc_fini_misc(guc);
> +	intel_uc_fw_cleanup_fetch(&i915->guc.fw);
>  }
> int intel_uc_init(struct drm_i915_private *i915)
> diff --git a/drivers/gpu/drm/i915/intel_uc.h  
> b/drivers/gpu/drm/i915/intel_uc.h
> index 3ea06c87dfcd..5a1383e192dd 100644
> --- a/drivers/gpu/drm/i915/intel_uc.h
> +++ b/drivers/gpu/drm/i915/intel_uc.h
> @@ -31,8 +31,8 @@
>  void intel_uc_init_early(struct drm_i915_private *dev_priv);
>  void intel_uc_cleanup_early(struct drm_i915_private *dev_priv);
>  void intel_uc_init_mmio(struct drm_i915_private *dev_priv);
> -int intel_uc_init_misc(struct drm_i915_private *dev_priv);
> -void intel_uc_fini_misc(struct drm_i915_private *dev_priv);
> +void intel_uc_fetch_firmwares(struct drm_i915_private *dev_priv);
> +void intel_uc_cleanup_firmwares(struct drm_i915_private *dev_priv);
>  void intel_uc_sanitize(struct drm_i915_private *dev_priv);
>  int intel_uc_init_hw(struct drm_i915_private *dev_priv);
>  void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e24955b5ebc2..f62dbd8c86de 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1433,13 +1433,11 @@  int i915_gem_init(struct drm_i915_private *dev_priv)
 	if (ret)
 		return ret;
 
-	ret = intel_uc_init_misc(dev_priv);
-	if (ret)
-		return ret;
+	intel_uc_fetch_firmwares(dev_priv);
 
 	ret = intel_wopcm_init(&dev_priv->wopcm);
 	if (ret)
-		goto err_uc_misc;
+		goto err_uc_fw;
 
 	/* This is just a security blanket to placate dragons.
 	 * On some systems, we very sporadically observe that the first TLBs
@@ -1565,8 +1563,8 @@  int i915_gem_init(struct drm_i915_private *dev_priv)
 	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
-err_uc_misc:
-	intel_uc_fini_misc(dev_priv);
+err_uc_fw:
+	intel_uc_cleanup_firmwares(dev_priv);
 
 	if (ret != -EIO) {
 		i915_gem_cleanup_userptr(dev_priv);
@@ -1632,7 +1630,7 @@  void i915_gem_driver_release(struct drm_i915_private *dev_priv)
 
 	intel_cleanup_gt_powersave(dev_priv);
 
-	intel_uc_fini_misc(dev_priv);
+	intel_uc_cleanup_firmwares(dev_priv);
 	i915_gem_cleanup_userptr(dev_priv);
 	intel_timelines_fini(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 183ab9b03ed0..4173b35bf104 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -99,20 +99,6 @@  void intel_guc_init_early(struct intel_guc *guc)
 	}
 }
 
-int intel_guc_init_misc(struct intel_guc *guc)
-{
-	struct drm_i915_private *i915 = guc_to_i915(guc);
-
-	intel_uc_fw_fetch(i915, &guc->fw);
-
-	return 0;
-}
-
-void intel_guc_fini_misc(struct intel_guc *guc)
-{
-	intel_uc_fw_cleanup_fetch(&guc->fw);
-}
-
 static int guc_shared_data_create(struct intel_guc *guc)
 {
 	struct i915_vma *vma;
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index ec1038c1f50e..91d538fd5f65 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -153,10 +153,8 @@  static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc,
 void intel_guc_init_early(struct intel_guc *guc);
 void intel_guc_init_send_regs(struct intel_guc *guc);
 void intel_guc_init_params(struct intel_guc *guc);
-int intel_guc_init_misc(struct intel_guc *guc);
 int intel_guc_init(struct intel_guc *guc);
 void intel_guc_fini(struct intel_guc *guc);
-void intel_guc_fini_misc(struct intel_guc *guc);
 int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len,
 		       u32 *response_buf, u32 response_buf_size);
 int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index fb6f693d3cac..2a41ee89a16d 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -44,14 +44,6 @@  void intel_huc_init_early(struct intel_huc *huc)
 	}
 }
 
-int intel_huc_init_misc(struct intel_huc *huc)
-{
-	struct drm_i915_private *i915 = huc_to_i915(huc);
-
-	intel_uc_fw_fetch(i915, &huc->fw);
-	return 0;
-}
-
 static int intel_huc_rsa_data_create(struct intel_huc *huc)
 {
 	struct drm_i915_private *i915 = huc_to_i915(huc);
diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h
index 2a6c94e79f17..9fa3d4629f2e 100644
--- a/drivers/gpu/drm/i915/intel_huc.h
+++ b/drivers/gpu/drm/i915/intel_huc.h
@@ -45,17 +45,11 @@  struct intel_huc {
 };
 
 void intel_huc_init_early(struct intel_huc *huc);
-int intel_huc_init_misc(struct intel_huc *huc);
 int intel_huc_init(struct intel_huc *huc);
 void intel_huc_fini(struct intel_huc *huc);
 int intel_huc_auth(struct intel_huc *huc);
 int intel_huc_check_status(struct intel_huc *huc);
 
-static inline void intel_huc_fini_misc(struct intel_huc *huc)
-{
-	intel_uc_fw_cleanup_fetch(&huc->fw);
-}
-
 static inline int intel_huc_sanitize(struct intel_huc *huc)
 {
 	intel_uc_fw_sanitize(&huc->fw);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index bc589efd3a6d..00baaccc2f1c 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -349,44 +349,26 @@  static void guc_disable_communication(struct intel_guc *guc)
 	DRM_INFO("GuC communication disabled\n");
 }
 
-int intel_uc_init_misc(struct drm_i915_private *i915)
+void intel_uc_fetch_firmwares(struct drm_i915_private *i915)
 {
-	struct intel_guc *guc = &i915->guc;
-	struct intel_huc *huc = &i915->huc;
-	int ret;
-
 	if (!USES_GUC(i915))
-		return 0;
-
-	ret = intel_guc_init_misc(guc);
-	if (ret)
-		return ret;
-
-	if (USES_HUC(i915)) {
-		ret = intel_huc_init_misc(huc);
-		if (ret)
-			goto err_guc;
-	}
+		return;
 
-	return 0;
+	intel_uc_fw_fetch(i915, &i915->guc.fw);
 
-err_guc:
-	intel_guc_fini_misc(guc);
-	return ret;
+	if (USES_HUC(i915))
+		intel_uc_fw_fetch(i915, &i915->huc.fw);
 }
 
-void intel_uc_fini_misc(struct drm_i915_private *i915)
+void intel_uc_cleanup_firmwares(struct drm_i915_private *i915)
 {
-	struct intel_guc *guc = &i915->guc;
-	struct intel_huc *huc = &i915->huc;
-
 	if (!USES_GUC(i915))
 		return;
 
 	if (USES_HUC(i915))
-		intel_huc_fini_misc(huc);
+		intel_uc_fw_cleanup_fetch(&i915->huc.fw);
 
-	intel_guc_fini_misc(guc);
+	intel_uc_fw_cleanup_fetch(&i915->guc.fw);
 }
 
 int intel_uc_init(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 3ea06c87dfcd..5a1383e192dd 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -31,8 +31,8 @@ 
 void intel_uc_init_early(struct drm_i915_private *dev_priv);
 void intel_uc_cleanup_early(struct drm_i915_private *dev_priv);
 void intel_uc_init_mmio(struct drm_i915_private *dev_priv);
-int intel_uc_init_misc(struct drm_i915_private *dev_priv);
-void intel_uc_fini_misc(struct drm_i915_private *dev_priv);
+void intel_uc_fetch_firmwares(struct drm_i915_private *dev_priv);
+void intel_uc_cleanup_firmwares(struct drm_i915_private *dev_priv);
 void intel_uc_sanitize(struct drm_i915_private *dev_priv);
 int intel_uc_init_hw(struct drm_i915_private *dev_priv);
 void intel_uc_fini_hw(struct drm_i915_private *dev_priv);