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[2/3] drm/i915/uc: Remove redundant ucode offset definition

Message ID 20190726155805.2736-2-michal.wajdeczko@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/3] drm/i915/uc: Remove redundant header_offset/size definitions | expand

Commit Message

Michal Wajdeczko July 26, 2019, 3:58 p.m. UTC 
According to Firmware layout definition, uCode is located right
after CSS header, so ucode offset is always same as header size.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 8 +++-----
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 1 -
 2 files changed, 3 insertions(+), 6 deletions(-)

Comments

Daniele Ceraolo Spurio July 26, 2019, 5:39 p.m. UTC | #1 
On 7/26/19 8:58 AM, Michal Wajdeczko wrote:
> According to Firmware layout definition, uCode is located right
> after CSS header, so ucode offset is always same as header size.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 8 +++-----
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 1 -
>   2 files changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 66bda0c514a3..05079c59ae04 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -229,7 +229,6 @@ void intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
>   	}
>   
>   	/* Firmware blob always starts with the header, then uCode */

This comment should be updated (or removed) as well. With that:

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> -	uc_fw->ucode_offset = sizeof(struct uc_css_header);
>   	uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
>   
>   	/* now RSA */
> @@ -239,7 +238,7 @@ void intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
>   		err = -ENOEXEC;
>   		goto fail;
>   	}
> -	uc_fw->rsa_offset = uc_fw->ucode_offset + uc_fw->ucode_size;
> +	uc_fw->rsa_offset = sizeof(struct uc_css_header) + uc_fw->ucode_size;
>   	uc_fw->rsa_size = css->key_size_dw * sizeof(u32);
>   
>   	/* At least, it should have header, uCode and RSA. Size of all three. */
> @@ -382,7 +381,7 @@ static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
>   	 * via DMA, excluding any other components
>   	 */
>   	intel_uncore_write_fw(uncore, DMA_COPY_SIZE,
> -			      uc_fw->ucode_offset + uc_fw->ucode_size);
> +			      sizeof(struct uc_css_header) + uc_fw->ucode_size);
>   
>   	/* Start the DMA */
>   	intel_uncore_write_fw(uncore, DMA_CTRL,
> @@ -536,8 +535,7 @@ void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p)
>   	drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n",
>   		   uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted,
>   		   uc_fw->major_ver_found, uc_fw->minor_ver_found);
> -	drm_printf(p, "\tuCode: offset %u, size %u\n",
> -		   uc_fw->ucode_offset, uc_fw->ucode_size);
> +	drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size);
>   	drm_printf(p, "\tRSA: offset %u, size %u\n",
>   		   uc_fw->rsa_offset, uc_fw->rsa_size);
>   }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> index a8048f91f0da..6a04bc6d419f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> @@ -77,7 +77,6 @@ struct intel_uc_fw {
>   	u32 rsa_size;
>   	u32 rsa_offset;
>   	u32 ucode_size;
> -	u32 ucode_offset;
>   };
>   
>   static inline
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 66bda0c514a3..05079c59ae04 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -229,7 +229,6 @@  void intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
 	}
 
 	/* Firmware blob always starts with the header, then uCode */
-	uc_fw->ucode_offset = sizeof(struct uc_css_header);
 	uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
 
 	/* now RSA */
@@ -239,7 +238,7 @@  void intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
 		err = -ENOEXEC;
 		goto fail;
 	}
-	uc_fw->rsa_offset = uc_fw->ucode_offset + uc_fw->ucode_size;
+	uc_fw->rsa_offset = sizeof(struct uc_css_header) + uc_fw->ucode_size;
 	uc_fw->rsa_size = css->key_size_dw * sizeof(u32);
 
 	/* At least, it should have header, uCode and RSA. Size of all three. */
@@ -382,7 +381,7 @@  static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
 	 * via DMA, excluding any other components
 	 */
 	intel_uncore_write_fw(uncore, DMA_COPY_SIZE,
-			      uc_fw->ucode_offset + uc_fw->ucode_size);
+			      sizeof(struct uc_css_header) + uc_fw->ucode_size);
 
 	/* Start the DMA */
 	intel_uncore_write_fw(uncore, DMA_CTRL,
@@ -536,8 +535,7 @@  void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p)
 	drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n",
 		   uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted,
 		   uc_fw->major_ver_found, uc_fw->minor_ver_found);
-	drm_printf(p, "\tuCode: offset %u, size %u\n",
-		   uc_fw->ucode_offset, uc_fw->ucode_size);
+	drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size);
 	drm_printf(p, "\tRSA: offset %u, size %u\n",
 		   uc_fw->rsa_offset, uc_fw->rsa_size);
 }
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
index a8048f91f0da..6a04bc6d419f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
@@ -77,7 +77,6 @@  struct intel_uc_fw {
 	u32 rsa_size;
 	u32 rsa_offset;
 	u32 ucode_size;
-	u32 ucode_offset;
 };
 
 static inline