From patchwork Wed Jul 31 17:48:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 11068971 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ABFF91399 for ; Wed, 31 Jul 2019 17:48:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9662E204FB for ; Wed, 31 Jul 2019 17:48:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8958522F3E; Wed, 31 Jul 2019 17:48:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E7614204FB for ; Wed, 31 Jul 2019 17:48:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 21E988981D; Wed, 31 Jul 2019 17:48:51 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5C4F889805 for ; Wed, 31 Jul 2019 17:48:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Jul 2019 10:48:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,330,1559545200"; d="scan'208";a="174245015" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by fmsmga007.fm.intel.com with ESMTP; 31 Jul 2019 10:48:44 -0700 Received: from mwajdecz-MOBL1.ger.corp.intel.com (mwajdecz-mobl1.ger.corp.intel.com [172.28.174.50]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id x6VHmg4w016470; Wed, 31 Jul 2019 18:48:44 +0100 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org Date: Wed, 31 Jul 2019 17:48:33 +0000 Message-Id: <20190731174833.22080-4-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190731174833.22080-1-michal.wajdeczko@intel.com> References: <20190731174833.22080-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 3/3] drm/i915/wopcm: Don't fail on WOPCM partitioning failure X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP We don't have to immediately fail on WOPCM partitioning, we can wait until we will start programming WOPCM registers. This should give us more options if we decide to restore fallback in case of GuC failures. v2: rebased Signed-off-by: Michal Wajdeczko Cc: Daniele Ceraolo Spurio Cc: Chris Wilson Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 5 +++++ drivers/gpu/drm/i915/i915_gem.c | 6 +----- drivers/gpu/drm/i915/intel_wopcm.c | 28 +++++++++++++-------------- drivers/gpu/drm/i915/intel_wopcm.h | 2 +- 4 files changed, 21 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index 3d0e9a893953..b08cff88e664 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c @@ -416,6 +416,11 @@ static int uc_init_wopcm(struct intel_uc *uc) u32 mask; int err; + if (unlikely(!base || !size)) { + i915_probe_error(gt->i915, "Unsuccessful WOPCM partitioning\n"); + return -E2BIG; + } + GEM_BUG_ON(!intel_uc_is_using_guc(uc)); GEM_BUG_ON(!(base & GUC_WOPCM_OFFSET_MASK)); GEM_BUG_ON(base & ~GUC_WOPCM_OFFSET_MASK); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 54a10c8c4dff..278fa44815e2 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1441,10 +1441,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) return ret; intel_uc_fetch_firmwares(&dev_priv->gt.uc); - - ret = intel_wopcm_init(&dev_priv->wopcm); - if (ret) - goto err_uc_fw; + intel_wopcm_init(&dev_priv->wopcm); /* This is just a security blanket to placate dragons. * On some systems, we very sporadically observe that the first TLBs @@ -1568,7 +1565,6 @@ int i915_gem_init(struct drm_i915_private *dev_priv) intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); mutex_unlock(&dev_priv->drm.struct_mutex); -err_uc_fw: intel_uc_cleanup_firmwares(&dev_priv->gt.uc); if (ret != -EIO) { diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c index 291881937d97..4c22143ee84f 100644 --- a/drivers/gpu/drm/i915/intel_wopcm.c +++ b/drivers/gpu/drm/i915/intel_wopcm.c @@ -156,12 +156,10 @@ static inline int check_hw_restriction(struct drm_i915_private *i915, * This function will partition WOPCM space based on GuC and HuC firmware sizes * and will allocate max remaining for use by GuC. This function will also * enforce platform dependent hardware restrictions on GuC WOPCM offset and - * size. It will fail the WOPCM init if any of these checks were failed, so that - * the following GuC firmware uploading would be aborted. - * - * Return: 0 on success, non-zero error code on failure. + * size. It will fail the WOPCM init if any of these checks fail, so that the + * following WOPCM registers setup and GuC firmware uploading would be aborted. */ -int intel_wopcm_init(struct intel_wopcm *wopcm) +void intel_wopcm_init(struct intel_wopcm *wopcm) { struct drm_i915_private *i915 = wopcm_to_i915(wopcm); u32 guc_fw_size = intel_uc_fw_get_upload_size(&i915->gt.uc.guc.fw); @@ -173,23 +171,25 @@ int intel_wopcm_init(struct intel_wopcm *wopcm) int err; if (!USES_GUC(i915)) - return 0; + return; GEM_BUG_ON(!wopcm->size); + GEM_BUG_ON(wopcm->guc.base); + GEM_BUG_ON(wopcm->guc.size); if (i915_inject_probe_failure(i915)) - return -E2BIG; + return; if (guc_fw_size >= wopcm->size) { DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.", guc_fw_size / 1024); - return -E2BIG; + return; } if (huc_fw_size >= wopcm->size) { DRM_ERROR("HuC FW (%uKiB) is too big to fit in WOPCM.", huc_fw_size / 1024); - return -E2BIG; + return; } guc_wopcm_base = ALIGN(huc_fw_size + WOPCM_RESERVED_SIZE, @@ -197,7 +197,7 @@ int intel_wopcm_init(struct intel_wopcm *wopcm) if ((guc_wopcm_base + ctx_rsvd) >= wopcm->size) { DRM_ERROR("GuC WOPCM base (%uKiB) is too big.\n", guc_wopcm_base / 1024); - return -E2BIG; + return; } guc_wopcm_size = wopcm->size - guc_wopcm_base - ctx_rsvd; @@ -211,16 +211,16 @@ int intel_wopcm_init(struct intel_wopcm *wopcm) DRM_ERROR("Need %uKiB WOPCM for GuC, %uKiB available.\n", (guc_fw_size + guc_wopcm_rsvd) / 1024, guc_wopcm_size / 1024); - return -E2BIG; + return; } err = check_hw_restriction(i915, guc_wopcm_base, guc_wopcm_size, huc_fw_size); if (err) - return err; + return; wopcm->guc.base = guc_wopcm_base; wopcm->guc.size = guc_wopcm_size; - - return 0; + GEM_BUG_ON(!wopcm->guc.base); + GEM_BUG_ON(!wopcm->guc.size); } diff --git a/drivers/gpu/drm/i915/intel_wopcm.h b/drivers/gpu/drm/i915/intel_wopcm.h index f9b603205bb1..17d6aa86008a 100644 --- a/drivers/gpu/drm/i915/intel_wopcm.h +++ b/drivers/gpu/drm/i915/intel_wopcm.h @@ -55,6 +55,6 @@ static inline u32 intel_wopcm_guc_size(struct intel_wopcm *wopcm) } void intel_wopcm_init_early(struct intel_wopcm *wopcm); -int intel_wopcm_init(struct intel_wopcm *wopcm); +void intel_wopcm_init(struct intel_wopcm *wopcm); #endif