[PULL] drm-intel-next

Hi Dave and Daniel, Here goes the first pull request targeting 5.4. It mostly comes with a lot of platform enabling patches and reworks and simplification around locking mechanisms, ppgtt allocation, engines and intel_gt in general. There were 2 silent backmerges that should be transparent for you. drm-intel-next-2019-07-30: - More changes on simplifying locking mechanisms (Chris) - Selftests fixes and improvements (Chris) - More work around engine tracking for better handling (Chris, Tvrtko) - HDCP debug and info improvements (Ram, Ashuman) - Add DSI properties (Vandita) - Rework on sdvo support for better debuggability before fixing bugs (Ville) - Display PLLs fixes and improvements, specially targeting Ice Lake (Imre, Matt, Ville) - Perf fixes and improvements (Lionel) - Enumerate scratch buffers (Lionel) - Add infra to hold off preemption on a request (Lionel) - Ice Lake color space fixes (Uma) - Type-C fixes and improvements (Lucas) - Fix and improvements around workarounds (Chris, John, Tvrtko) - GuC related fixes and improvements (Chris, Daniele, Michal, Tvrtko) - Fix on VLV/CHV display power domain (Ville) - Improvements around Watermark (Ville) - Favor intel_ types on intel_atomic functions (Ville) - Don’t pass stack garbage to pcode (Ville) - Improve display tracepoints (Steven) - Don’t overestimate 4:2:0 link symbol clock (Ville) - Add support for 4th pipe and transcoder (Lucas) - Introduce initial support for Tiger Lake platform (Daniele, Lucas, Mahesh, Jose, Imre, Mika, Vandita, Rodrigo, Michel) - PPGTT allocation simplification (Chris) - Standardize function names and suffixes to make clean, symmetric and let checkpatch happy (Janusz) - Skip SINK_COUNT read on CH7511 (Ville) - Fix on kernel documentation (Chris, Michal) - Add modular FIA (Anusha, Lucas) - Fix EHL display (Matt, Vivek) - Enable hotplug retry (Imre, Jose) - Disable preemption under GVT (Chris) - OA; Reconfigure context on the fly (Chris) - Fixes and improvements around engine reset. (Chris) - Small clean up on display pipe fault mask (Ville) - Make sure cdclk is high enough for DP audio on VLV/CHV (Ville) - Drop some wmb() and improve pwrite flush (Chris) - Fix critical PSR regression (DK) - Remove unused variables (YueHaibing) - Use dev_get_drvdata for simplification (Chunhong) - Use upstream version of header tests (Jani) drm-intel-next-2019-07-08: - Signal fence completion from i915_request_wait (Chris) - Fixes and improvements around rings pin/unpin (Chris) - Display uncore prep patches (Daniele) - Execlists preemption improvements (Chris) - Selftests fixes and improvements (Chris) - More Elkhartlake enabling work (Vandita, Jose, Matt, Vivek) - Defer address space cleanup to an RCU worker (Chris) - Implicit dev_priv removal and GT compartmentalization and other related follow-ups (Tvrtko, Chris) - Prevent dereference of engine before NULL check in error capture (Chris) - GuC related fixes (Daniele, Robert) - Many changes on active tracking, timelines and locking mechanisms (Chris) - Disable SAMPLER_STATE prefetching on Gen11 (HW W/a) (Kenneth) - I915_perf fixes (Lionel) - Add Ice Lake PCI ID (Mika) - eDP backlight fix (Lee) - Fix various gen2 tracepoints (Ville) - Some irq vfunc clean-up and improvements (Ville) - Move OA files to separated folder (Michal) - Display self contained headers clean-up (Jani) - Preparation for 4th pile (Lucas) - Move atomic commit, watermark and other places to use more intel_crtc_state (Maarten) - Many Ice Lake Type C and Thunderbolt fixes (Imre) - Fix some Ice Lake hw w/a whitelist regs (Lionel) - Fix memleak in runtime wakeref tracking (Mika) - Remove unused Private PPAT manager (Michal) - Don't check PPGTT presence on PPGTT-only platforms (Michal) - Fix ICL DSI suspend/resume (Chris) - Fix ICL Bandwidth issues (Ville) - Add N & CTS values for 10/12 bit deep color (Aditya) - Moving more GT related stuff under gt folder (Chris) - Forcewake related fixes (Chris) - Show support for accurate sw PMU busyness tracking (Chris) - Handle gtt double alloc failures (Chris) - Upgrade to new GuC version (Michal) - Improve w/a debug dumps and pull engine w/a initialization into a common (Chris) - Look for instdone on all engines at hangcheck (Tvrtko) - Engine lookup simplification (Chris) - Many plane color formats fixes and improvements (Ville) - Fix some compilation issues (YueHaibing) - GTT page directory clean up and improvements (Mika) Thanks, Rodrigo. The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b: Linus 5.3-rc1 (2019-07-21 14:05:38 -0700) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2019-07-30 for you to fetch changes up to e0e712fe42ef67bdf45fc348767d1d0a4eeba77f: drm/i915: Update DRIVER_DATE to 20190730 (2019-07-30 11:50:24 -0700) ---------------------------------------------------------------- - More changes on simplifying locking mechanisms (Chris) - Selftests fixes and improvements (Chris) - More work around engine tracking for better handling (Chris, Tvrtko) - HDCP debug and info improvements (Ram, Ashuman) - Add DSI properties (Vandita) - Rework on sdvo support for better debuggability before fixing bugs (Ville) - Display PLLs fixes and improvements, specially targeting Ice Lake (Imre, Matt, Ville) - Perf fixes and improvements (Lionel) - Enumerate scratch buffers (Lionel) - Add infra to hold off preemption on a request (Lionel) - Ice Lake color space fixes (Uma) - Type-C fixes and improvements (Lucas) - Fix and improvements around workarounds (Chris, John, Tvrtko) - GuC related fixes and improvements (Chris, Daniele, Michal, Tvrtko) - Fix on VLV/CHV display power domain (Ville) - Improvements around Watermark (Ville) - Favor intel_ types on intel_atomic functions (Ville) - Don’t pass stack garbage to pcode (Ville) - Improve display tracepoints (Steven) - Don’t overestimate 4:2:0 link symbol clock (Ville) - Add support for 4th pipe and transcoder (Lucas) - Introduce initial support for Tiger Lake platform (Daniele, Lucas, Mahesh, Jose, Imre, Mika, Vandita, Rodrigo, Michel) - PPGTT allocation simplification (Chris) - Standardize function names and suffixes to make clean, symmetric and let checkpatch happy (Janusz) - Skip SINK_COUNT read on CH7511 (Ville) - Fix on kernel documentation (Chris, Michal) - Add modular FIA (Anusha, Lucas) - Fix EHL display (Matt, Vivek) - Enable hotplug retry (Imre, Jose) - Disable preemption under GVT (Chris) - OA; Reconfigure context on the fly (Chris) - Fixes and improvements around engine reset. (Chris) - Small clean up on display pipe fault mask (Ville) - Make sure cdclk is high enough for DP audio on VLV/CHV (Ville) - Drop some wmb() and improve pwrite flush (Chris) - Fix critical PSR regression (DK) - Remove unused variables (YueHaibing) - Use dev_get_drvdata for simplification (Chunhong) - Use upstream version of header tests (Jani) ---------------------------------------------------------------- Aditya Swarup (2): drm/i915: Use port clock to set correct N value drm/i915: Add N & CTS values for 10/12 bit deep color Anshuman Gupta (1): drm/i915: Add HDCP capability info to i915_display_info. Anusha Srivatsa (1): drm/i915: Add modular FIA Chris Wilson (116): drm/i915: Signal fence completion from i915_request_wait drm/i915: Flush the execution-callbacks on retiring drm/i915: Keep rings pinned while the context is active drm/i915/execlists: Preempt-to-busy drm/i915/execlists: Minimalistic timeslicing drm/i915: Rings are always flushed drm/i915/selftests: Use request managed wakerefs drm/i915/gtt: Defer address space cleanup to an RCU worker drm/i915/execlists: Keep virtual context alive until after we kick drm/i915: Prevent dereference of engine before NULL check in error capture drm/i915/gt: Rename i915_gt_timelines drm/i915/gt: Fixup kerneldoc parameters drm/i915: Remove waiting & retiring from shrinker paths drm/i915: Track i915_active using debugobjects drm/i915: Throw away the active object retirement complexity drm/i915: Provide an i915_active.acquire callback drm/i915: Local debug BUG_ON for intel_wakeref drm/i915/blt: Remove recursive vma->lock drm/i915/execlists: Always clear ring_pause if we do not submit drm/i915/gem: Clear read/write domains for GPU clear drm/i915/execlists: Convert recursive defer_request() into iterative drm/i915/gt: Pass intel_gt to pm routines drm/i915: Rename intel_wakeref_[is]_active drm/i915/selftests: Hold ref on request across waits drm/i915/gt: Drop stale commentary for timeline density drm/i915/gt: Always call kref_init for the timeline drm/i915/gt: Add some debug tracing for context pinning drm/i915/selftests: Serialise nop reset with retirement drm/i915/selftests: Drop manual request wakerefs around hangcheck drm/i915/selftests: Fixup atomic reset checking drm/i915: Add a wakeref getter for iff the wakeref is already active drm/i915: Only recover active engines drm/i915: Lift intel_engines_resume() to callers drm/i915: Make i945gm_vblank_work_func static drm/i915/guc: Avoid reclaim locks during reset drm/i915/execlists: Refactor CSB state machine drm/i915: Report if i915_active is still busy upon waiting drm/i915/display: Handle lost primary_port across suspend drm/i915/selftests: Common live setup/teardown drm/i915/selftests: Lock the drm_mm while modifying drm/i915/execlists: Hesitate before slicing drm/i915/gem: Free pages before rcu-freeing the object drm/i915: Markup potential lock for i915_active drm/i915: Mark up vma->active as safe for use inside shrinkers drm/i915/gtt: Defer the free for alloc error paths drm/i915: Move the renderstate setup under gt/ drm/i915: Flush the workqueue before draining drm/i915: Check caller held wakerefs in assert_forcewakes_active drm/i915/gt: Use caller provided forcewake for intel_mocs_init_engine drm/i915/gt: Assume we hold forcewake for execlists resume drm/i915/gt: Ignore forcewake acquisition for posting_reads drm/i915/gem: Defer obj->base.resv fini until RCU callback drm/i915: Show support for accurate sw PMU busyness tracking drm/i915/gtt: Handle double alloc failures drm/i915: Dump w/a lists on all engines drm/i915/gt: Pull engine w/a initialisation into common drm/i915/gtt: Mark the freed page table entries with scratch drm/i915/selftests: Drain the freedlists between exec passes drm/i915/overlay: Stash the kernel context on initialisation drm/i915/selftests: Be engine agnostic drm/i915: Show instdone for each engine in debugfs drm/i915: Order assert forcewake test drm/i915: Pull assert_forcewake_active() underneath the lock drm/i915: Explicitly track active fw_domain timers drm/i915/selftests: Reorder error cleanup for whitelist checking drm/i915/selftests: Set igt_spinner.gt for early exit drm/i915/userptr: Acquire the page lock around set_page_dirty() drm/i915/selftests: Fill in a little more of the dummy fence drm/i915/gt: Apply RCS workarounds to the render class drm/i915/gt: Remove presumption of RCS0 drm/i915/userptr: Don't mark readonly objects as dirty drm/i915/execlists: Record preemption for selftests drm/i915/gt: Drop the duplicate icl workaround drm/i915/selftests: Ensure we don't clamp a random offset to 32b drm/i915/guc: Remove preemption support for current fw drm/i915/selftests: Hold the vma manager lock while modifying mmap_offset drm/i915/guc: Drop redundant ctx param from kerneldoc drm/i915/gtt: Use shallow dma pages for scratch drm/i915/gtt: Wrap page_table with page_directory drm/i915/gtt: Reorder gen8 ppgtt free/clear/alloc drm/i915/gtt: Markup i915_ppgtt height drm/i915/gtt: Compute the radix for gen8 page table levels drm/i915/gtt: Convert vm->scratch into an array drm/i915/gtt: Use NULL to encode scratch shadow entries drm/i915/display: Drop kerneldoc for 'intel_atomic_commit' drm/i915/gtt: Recursive cleanup for gen8 drm/i915/gtt: Recursive ppgtt clear for gen8 drm/i915/gt: Use intel_gt as the primary object for handling resets drm/i915/guc: Use system workqueue for log capture drm/i915/selftests: Ignore self-preemption suppression under gvt drm/i915: Lock the engine while dumping the active request drm/i915/execlists: Disable preemption under GVT drm/i915/gtt: Recursive ppgtt alloc for gen8 drm/i915/gtt: Tidy up ppgtt insertion for gen8 drm/i915/oa: Reconfigure contexts on the fly drm/i915/execlists: Process interrupted context on reset drm/i915/gt: Push engine stopping into reset-prepare drm/i915: Drop wmb() inside pread_gtt drm/i915: Use maximum write flush for pwrite_gtt drm/i915/execlists: Cancel breadcrumb on preempting the virtual engine drm/i915/gtt: Correct unshifted 'from' for gen8_ppgtt_alloc errors drm/i915/gtt: Fix rounding for 36b drm/i915: Remove obsolete engine cleanup drm/i915/gt: Hook up intel_context_fini() drm/i915: Rely on spinlock protection for GPU error capture drm/i915/selftests: Let igt_vma_partial et al breathe drm/i915: Squelch nop wait-for-idle trace drm/i915: Capture vma contents outside of spinlock drm/i915/perf: Initialise err to 0 before looping over ce->engines drm/i915/gt: Add to timeline requires the timeline mutex drm/i915/uc: Fixup kerneldoc after params were flipped and renamed drm/i915/selftests: Careful not to flush hang_fini on error setups drm/i915: Flush the i915_vm_release before ggtt shutdown drm/i915: Inline engine->init_context into its caller drm/i915: Move aliasing_ppgtt underneath its i915_ggtt drm/i915/gt: Provide a local intel_context.vm Chuhong Yuan (1): drm/i915: Use dev_get_drvdata Daniele Ceraolo Spurio (33): drm/i915: use vfuncs for reg_read/write_fw_domains drm/i915: kill uncore_sanitize drm/i915: kill uncore_to_i915 drm/i915: skip forcewake actions on forcewake-less uncore drm/i915: dynamically allocate forcewake domains drm/i915/gvt: decouple check_vgpu() from uncore_init() drm/i915/guc: reorder enable/disable communication steps drm/i915/guc: handle GuC messages received with CTB disabled drm/i915/guc: Simplify guc client drm/i915/tgl: add initial Tiger Lake definitions drm/i915/uc: replace uc init/fini misc drm/i915/uc: introduce intel_uc_fw_supported drm/i915/guc: move guc irq functions to intel_guc parameter drm/i915/guc: unify guc irq handling drm/i915/uc: move GuC and HuC files under gt/uc/ drm/i915/uc: move GuC/HuC inside intel_gt under a new intel_uc drm/i915/uc: Move intel functions to intel_uc drm/i915/uc: prefer intel_gt over i915 in GuC/HuC paths drm/i915/guc: prefer intel_gt in guc interrupt functions drm/i915/uc: kill <g,h>uc_to_i915 drm/i915/uc: Gt-fy uc reset drm/i915/uc: Sanitize uC when GT is sanitized drm/i915/huc: fix status check drm/i915/guc: Set GuC init params only once drm/i915/uc: Unify uC platform check drm/i915: Fix handling of non-supported uC drm/i915/uc: Unify uC FW selection drm/i915/uc: Unify uc_fw status tracking drm/i915/uc: Move xfer rsa logic to common function drm/i915/huc: Copy huc rsa only once drm/i915/uc: Plumb the gt through fw_upload drm/i915/uc: Unify uC firmware upload drm/i915/guc: init submission structures as part of guc_init Dhinakaran Pandiyan (1): drm/i915/vbt: Fix VBT parsing for the PSR section Imre Deak (27): drm/i915/icl: Add support to read out the TBT PLL HW state drm/i915: Tune down WARNs about TBT AUX power well enabling drm/i915: Move the TypeC port handling code to a separate file drm/i915: Sanitize the terminology used for TypeC port modes drm/i915: Don't enable the DDI-IO power in the TypeC TBT-alt mode drm/i915: Fix the TBT AUX power well enabling drm/i915: Use the correct AUX power domain in TypeC TBT-alt mode drm/i915: Unify the TypeC port notation in debug/error messages drm/i915: Factor out common parts from TypeC port handling functions drm/i915: Wait for TypeC PHY complete flag to clear in safe mode drm/i915: Handle the TCCOLD power-down event drm/i915: Sanitize the TypeC connect/detect sequences drm/i915: Fix the TypeC port mode sanitization during loading/resume drm/i915: Keep the TypeC port mode fixed for detect/AUX transfers drm/i915: Sanitize the TypeC FIA lane configuration decoding drm/i915: Sanitize the shared DPLL reserve/release interface drm/i915: Sanitize the shared DPLL find/reference interface drm/i915/icl: Split getting the DPLLs to port type specific functions drm/i915/icl: Reserve all required PLLs for TypeC ports drm/i915: Keep the TypeC port mode fixed when the port is active drm/i915: Add state verification for the TypeC port mode drm/i915: Remove unneeded disconnect in TypeC legacy port mode drm/i915: WARN about invalid lane reversal in TBT-alt/DP-alt modes drm/i915: Clear the shared PLL from the put_dplls() hook drm/i915/icl: Clear the shared port PLLs from the new crtc state drm/i915/tgl: Add power well support drm/i915: Add support for retrying hotplug Jani Nikula (12): drm/i915: prefix header search path with $(srctree)/ drm/i915: add header search path to subdir Makefiles drm/i915: make i915_fixed.h self-contained drm/i915: make i915_globals.h self-contained drm/i915: make i915_pvinfo.h self-contained drm/i915: make i915_vgpu.h self-contained drm/i915: make intel_guc_ct.h self-contained drm/i915: make intel_guc_fwif.h self-contained drm/i915: make intel_guc_reg.h self-contained drm/i915: make intel_gvt.h self-contained drm/i915: make intel_uc_fw.h self-contained drm/i915: use upstream version of header tests Janusz Krzysztofik (6): drm/i915: Drop extern qualifiers from header function prototypes drm/i915: Rename "_load"/"_unload" to match PCI entry points drm/i915: Replace "_load" with "_probe" consequently drm/i915: Propagate "_release" function name suffix down drm/i915: Propagate "_remove" function name suffix down drm/i915: Propagate "_probe" function name suffix down John Harrison (3): drm/i915: Add test for invalid flag bits in whitelist entries drm/i915: Implement read-only support in whitelist selftest drm/i915: Add engine name to workaround debug print José Roberto de Souza (9): drm/i915/ehl/dsi: Enable AFE over PPI strap drm/i915/ehl: Add missing VECS engine drm/i915/icl: Add new supported CD clocks drm/i915/ehl: Remove unsupported cd clocks drm/i915/ehl: Add voltage level requirement table drm/i915/tgl: Check if pipe D is fused drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder A drm/i915/tgl: Update DPLL clock reference register drm/i915: Enable hotplug retry Kenneth Graunke (1): drm/i915: Disable SAMPLER_STATE prefetching on all Gen11 steppings. Lee Shawn C (1): drm/i915: Check backlight type while doing eDP backlight initializaiton Lionel Landwerlin (8): drm/i915/perf: fix ICL perf register offsets drm/i915: fix whitelist selftests with readonly registers drm/i915: whitelist PS_(DEPTH|INVOCATION)_COUNT drm/i915/icl: whitelist PS_(DEPTH|INVOCATION)_COUNT drm/i915/perf: ensure we keep a reference on the driver drm/i915: enumerate scratch fields drm/i915: add infrastructure to hold off preemption on a request drm/i915/perf: add missing delay for OA muxes configuration Lucas De Marchi (12): drm/i915: rework reading pipe disable fuses drm/i915: make new intel_tc.c use uncore accessors drm/i915: fix include order in intel_tc.* drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.c drm/i915: Add 4th pipe and transcoder drm/i915/tgl: Add TGL PCI IDs drm/i915/tgl: Add additional PHYs for Tiger Lake drm/i915/tgl: apply Display WA #1178 to fix type C dongles drm/i915/tgl: port to ddc pin mapping drm/i915/tgl: Add DPLL registers drm/i915/tgl: add modular FIA to device info drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization Maarten Lankhorst (6): drm/i915: Pass intel_crtc_state to needs_modeset() drm/i915: Convert most of atomic commit to take more intel state drm/i915: Convert hw state verifier to take more intel state, v2. drm/i915: Use intel_crtc_state in sanitize_watermarks() too drm/i915: Pass intel state to plane functions as well drm/i915: Use intel state as much as possible in wm code Mahesh Kumar (6): drm/i915/tgl: Add TGL PCH detection in virtualized environment drm/i915/tgl: init ddi port A-C for Tiger Lake drm/i915/tgl: Add gmbus gpio pin to port mapping drm/i915/tgl: Add vbt value mapping for DDC Bus pin drm/i915/tgl: select correct bit for port select drm/i915/tgl: update ddi/tc clock_off bits Matt Roper (11): drm/i915/ehl: Allow combo PHY A to drive a third external display drm/i915/ehl: Add one additional PCH ID to MCC drm/i915/icl: Drop port parameter to icl_get_combo_buf_trans() drm/i915/ehl: Add third combo PHY offset drm/i915/ehl: Don't program PHY_MISC on EHL PHY C drm/i915/gen11: Start distinguishing 'phy' from 'port' drm/i915/gen11: Program ICL_DPCLKA_CFGCR0 according to PHY drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespace drm/i915: Transition port type checks to phy checks drm/i915/ehl: Enable DDI-D drm/i915/ehl: Map MCC pins based on PHY, not port Michal Wajdeczko (14): drm/i915: Move OA files to separate folder drm/i915/guc: Upgrade to GuC 33.0.0 drm/i915/guc: Don't enable GuC/HuC in auto mode on pre-Gen11 drm/i915/guc: Turn on GuC/HuC auto mode drm/i915/gtt: Don't try to clear failed empty pd allocation drm/i915: Fix GuC documentation links drm/i915/uc: Update drawing for firmware layout drm/i915/uc: Move uc firmware layout definitions to dedicated file drm/i915/uc: Reorder params in intel_uc_fw_fetch drm/i915/uc: Don't sanitize guc_log_level modparam drm/i915/uc: Remove redundant header_offset/size definitions drm/i915/uc: Remove redundant ucode offset definition drm/i915/uc: Remove redundant RSA offset definition drm/i915/uc: Don't fail on HuC firmware failure Michał Winiarski (2): Revert "drm/i915: Introduce private PAT management" drm/i915/gtt: Don't check PPGTT presence on PPGTT-only platforms Michel Thierry (1): x86/gpu: add TGL stolen memory support Mika Kahola (2): drm/i915/icl: Add missing device ID drm/i915/tgl: Add power well to support 4th pipe Mika Kuoppala (5): drm/i915: Fix memleak in runtime wakeref tracking drm/i915/gtt: pde entry encoding is identical drm/i915/gtt: Tear down setup and cleanup macros for page dma drm/i915/gtt: Setup phys pages for 3lvl pdps drm/i915/gtt: Introduce release_pd_entry Radhakrishna Sripada (1): drm/i915/tgl: Introduce Tiger Lake PCH Ramalingam C (1): drm/i915/hdcp: debug logs for sink related failures Robert M. Fosha (1): drm/i915/guc: Add debug capture of GuC exception Rodrigo Vivi (5): drm/i915: Update DRIVER_DATE to 20190708 Merge drm/drm-next into drm-intel-next-queued drm/i915/gen12: MBUS B credit change Merge drm/drm-next into drm-intel-next-queued drm/i915: Update DRIVER_DATE to 20190730 Steven Rostedt (VMware) (1): drm/i915: Copy name string into ring buffer for intel_update/disable_plane tracepoints Tvrtko Ursulin (48): drm/i915: Convert intel_vgt_(de)balloon to uncore drm/i915: Introduce struct intel_gt as replacement for anonymous i915->gt drm/i915: Move intel_gt initialization to a separate file drm/i915: Store some backpointers in struct intel_gt drm/i915: Move intel_gt_pm_init under intel_gt_init_early drm/i915: Make i915_check_and_clear_faults take intel_gt drm/i915: Convert i915_gem_init_swizzling to intel_gt drm/i915: Use intel_uncore_rmw in intel_gt_init_swizzling drm/i915: Convert init_unused_rings to intel_gt drm/i915: Convert gt workarounds to intel_gt drm/i915: Store backpointer to intel_gt in the engine drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt drm/i915: Convert i915_ppgtt_init_hw to intel_gt drm/i915: Consolidate some open coded mmio rmw drm/i915: Convert i915_gem_init_hw to intel_gt drm/i915: Move intel_engines_resume into common init drm/i915: Stop using I915_READ/WRITE in intel_wopcm_init_hw drm/i915: Compartmentalize i915_ggtt_probe_hw drm/i915: Compartmentalize i915_ggtt_init_hw drm/i915: Make ggtt invalidation work on ggtt drm/i915: Store intel_gt backpointer in vm drm/i915: Compartmentalize i915_gem_suspend/restore_gtt_mappings drm/i915: Convert i915_gem_flush_ggtt_writes to intel_gt drm/i915: Move i915_gem_chipset_flush to intel_gt drm/i915: Compartmentalize timeline_init/park/fini drm/i915: Compartmentalize i915_ggtt_cleanup_hw drm/i915: Compartmentalize i915_gem_init_ggtt drm/i915: Store ggtt pointer in intel_gt drm/i915: Compartmentalize ring buffer creation drm/i915: Save trip via top-level i915 in a few more places drm/i915: Make timelines gt centric drm/i915: Rename i915_timeline to intel_timeline and move under gt drm/i915: Eliminate dual personality of i915_scratch_offset drm/i915/hangcheck: Look at instdone for all engines drm/i915: Rework some interrupt handling functions to take intel_gt drm/i915: Remove some legacy mmio accessors from interrupt handling drm/i915: Move dev_priv->pm_i{m, e}r into intel_gt drm/i915: Remove unused i915_gem_context_lookup_engine drm/i915: Update description of i915.enable_guc modparam drm/i915: Fix GEN8_MCR_SELECTOR programming drm/i915: Trust programmed MCR in read_subslice_reg drm/i915: Fix and improve MCR selection logic drm/i915: Skip CS verification of L3 bank registers drm/i915/icl: Verify engine workarounds in GEN8_L3SQCREG4 drm/i915/icl: Add Wa_1409178092 Revert "drm/i915/guc: Turn on GuC/HuC auto mode" Revert "drm/i915: Update description of i915.enable_guc modparam" drm/i915: Do not rely on for loop caching the mask Uma Shankar (3): drm/i915/icl: Handle YCbCr to RGB conversion for BT2020 case drm/i915/icl: Fix Y pre-offset for Full Range YCbCr drm/i915/icl: Fixed Input CSC Co-efficients for BT601/709 Vandita Kulkarni (5): drm/i915/ehl/dsi: Set lane latency optimization for DW1 drm/i915: Add icl mipi dsi properties drm/i915/tgl: Add new pll ids drm/i915/tgl: Add pll manager drm/i915/tgl: Add additional ports for Tiger Lake Ville Syrjälä (29): drm/i915: Fix various tracepoints for gen2 drm/i915: Switch to per-crtc vblank vfuncs drm/i915: Nuke drm_driver irq vfuncs drm/i915: Initialize drm_driver vblank funcs at compile time drm/i915: synchronize_irq() against the actual irq drm/i915: Deal with machines that expose less than three QGV points drm/i915: Add windowing for primary planes on gen2/3 and chv drm/i915: Disable sprite gamma on ivb-bdw drm/i915: Program plane gamma ramps drm/i915: Deal with cpp==8 for g4x watermarks drm/i915: Cosmetic fix for skl+ plane switch statement drm/i915: Clean up skl vs. icl plane formats drm/i915/sdvo: Use named initializers for the SDVO command names drm/i915/sdvo: Remove duplicate SET_INPUT_TIMINGS_PART1 cmd name string drm/i915/sdvo: Shrink sdvo_cmd_names[] strings drm/i915/sdvo: Add helpers to get the cmd/status string drm/i915/sdvo: Fix handling if zero hbuf size drm/i915: Use the "display core" power domain in vlv/chv set_cdclk() drm/i915: Check crtc_state->wm.need_postvbl_update before grabbing wm.mutex drm/i915: Simplify modeset_get_crtc_power_domains() arguments drm/i915: Polish intel_shared_dpll_swap_state() drm/i915: Polish intel_atomic_track_fbs() drm/i915: Use intel_ types in intel_{lock,modeset}_all_pipes() drm/i915: Use intel_ types in intel_atomic_commit() drm/i915: Don't pass stack garbage to pcode in the second data register drm/i915: Don't overestimate 4:2:0 link symbol clock drm/i915: Skip SINK_COUNT read on CH7511 drm/i915: Add gen8_de_pipe_fault_mask() drm/i915: Make sure cdclk is high enough for DP audio on VLV/CHV Vivek Kasireddy (2): drm/i915/ehl: Add support for DPLL4 (v10) drm/i915/ehl: Use an id of 4 while accessing DPLL4's CR0 and CR1 YueHaibing (4): drm/i915: Remove set but not used variable 'encoder' drm/i915: Remove set but not used variable 'intel_dig_port' drm/i915: Remove set but not used variable 'src_y' drm/i915/dsi: remove set but not used variable 'hfront_porch' Documentation/gpu/i915.rst | 20 +- arch/x86/kernel/early-quirks.c | 1 + drivers/gpu/drm/i915/Kconfig.debug | 15 + drivers/gpu/drm/i915/Makefile | 81 +- drivers/gpu/drm/i915/Makefile.header-test | 22 - drivers/gpu/drm/i915/display/Makefile | 6 +- drivers/gpu/drm/i915/display/Makefile.header-test | 16 - drivers/gpu/drm/i915/display/icl_dsi.c | 185 +- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 56 +- drivers/gpu/drm/i915/display/intel_atomic_plane.h | 5 +- drivers/gpu/drm/i915/display/intel_audio.c | 81 +- drivers/gpu/drm/i915/display/intel_bios.c | 30 +- drivers/gpu/drm/i915/display/intel_bios.h | 3 +- drivers/gpu/drm/i915/display/intel_bw.c | 17 +- drivers/gpu/drm/i915/display/intel_cdclk.c | 95 +- drivers/gpu/drm/i915/display/intel_combo_phy.c | 193 +- drivers/gpu/drm/i915/display/intel_combo_phy.h | 4 +- drivers/gpu/drm/i915/display/intel_connector.c | 2 +- drivers/gpu/drm/i915/display/intel_ddi.c | 403 ++-- drivers/gpu/drm/i915/display/intel_display.c | 1249 +++++++----- drivers/gpu/drm/i915/display/intel_display.h | 50 +- drivers/gpu/drm/i915/display/intel_display_power.c | 655 ++++++- drivers/gpu/drm/i915/display/intel_display_power.h | 35 +- drivers/gpu/drm/i915/display/intel_dp.c | 291 +-- drivers/gpu/drm/i915/display/intel_dp.h | 2 - .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 5 +- drivers/gpu/drm/i915/display/intel_dp_mst.h | 8 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 652 +++++-- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 57 +- drivers/gpu/drm/i915/display/intel_dsi.h | 12 +- drivers/gpu/drm/i915/display/intel_gmbus.c | 20 +- drivers/gpu/drm/i915/display/intel_hdcp.c | 12 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 75 +- drivers/gpu/drm/i915/display/intel_hotplug.c | 59 +- drivers/gpu/drm/i915/display/intel_hotplug.h | 5 +- drivers/gpu/drm/i915/display/intel_overlay.c | 10 +- drivers/gpu/drm/i915/display/intel_pipe_crc.c | 2 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 314 +-- drivers/gpu/drm/i915/display/intel_sprite.c | 335 +++- drivers/gpu/drm/i915/display/intel_tc.c | 537 +++++ drivers/gpu/drm/i915/display/intel_tc.h | 35 + drivers/gpu/drm/i915/display/intel_vbt_defs.h | 9 +- drivers/gpu/drm/i915/display/intel_vdsc.c | 14 +- drivers/gpu/drm/i915/display/vlv_dsi.c | 4 +- drivers/gpu/drm/i915/gem/Makefile | 6 +- drivers/gpu/drm/i915/gem/Makefile.header-test | 16 - drivers/gpu/drm/i915/gem/i915_gem_client_blt.c | 21 +- drivers/gpu/drm/i915/gem/i915_gem_context.c | 83 +- drivers/gpu/drm/i915/gem/i915_gem_context.h | 6 - drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 4 +- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 22 +- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 8 +- drivers/gpu/drm/i915/gem/i915_gem_object.c | 97 +- drivers/gpu/drm/i915/gem/i915_gem_object.h | 8 +- drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 6 +- drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 1 - drivers/gpu/drm/i915/gem/i915_gem_phys.c | 12 +- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 42 +- drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 7 + drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 27 +- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 - drivers/gpu/drm/i915/gem/i915_gem_throttle.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 21 +- drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 69 +- .../drm/i915/gem/selftests/i915_gem_client_blt.c | 26 +- .../drm/i915/gem/selftests/i915_gem_coherency.c | 9 +- .../gpu/drm/i915/gem/selftests/i915_gem_context.c | 85 +- drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 59 +- .../drm/i915/gem/selftests/i915_gem_object_blt.c | 15 +- drivers/gpu/drm/i915/gt/Makefile | 5 +- drivers/gpu/drm/i915/gt/Makefile.header-test | 16 - .../gen6_renderstate.c} | 0 .../gen7_renderstate.c} | 0 .../gen8_renderstate.c} | 0 .../gen9_renderstate.c} | 0 drivers/gpu/drm/i915/gt/intel_context.c | 140 +- drivers/gpu/drm/i915/gt/intel_context.h | 18 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 9 +- drivers/gpu/drm/i915/gt/intel_engine.h | 75 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 209 +- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 31 +- drivers/gpu/drm/i915/gt/intel_engine_pm.h | 18 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 86 +- drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 7 + drivers/gpu/drm/i915/gt/intel_gt.c | 250 +++ drivers/gpu/drm/i915/gt/intel_gt.h | 60 + drivers/gpu/drm/i915/gt/intel_gt_pm.c | 73 +- drivers/gpu/drm/i915/gt/intel_gt_pm.h | 12 +- drivers/gpu/drm/i915/gt/intel_gt_types.h | 96 + drivers/gpu/drm/i915/gt/intel_hangcheck.c | 71 +- drivers/gpu/drm/i915/gt/intel_lrc.c | 1027 +++++----- drivers/gpu/drm/i915/gt/intel_mocs.c | 62 +- drivers/gpu/drm/i915/gt/intel_mocs.h | 6 +- .../intel_renderstate.c} | 13 +- drivers/gpu/drm/i915/{ => gt}/intel_renderstate.h | 10 +- drivers/gpu/drm/i915/gt/intel_reset.c | 660 +++---- drivers/gpu/drm/i915/gt/intel_reset.h | 75 +- drivers/gpu/drm/i915/gt/intel_reset_types.h | 50 + drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 249 ++- .../i915/{i915_timeline.c => gt/intel_timeline.c} | 230 +-- drivers/gpu/drm/i915/gt/intel_timeline.h | 93 + .../intel_timeline_types.h} | 8 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 261 ++- drivers/gpu/drm/i915/gt/intel_workarounds.h | 6 +- drivers/gpu/drm/i915/gt/intel_workarounds_types.h | 1 + drivers/gpu/drm/i915/gt/mock_engine.c | 15 +- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 511 +++-- drivers/gpu/drm/i915/gt/selftest_lrc.c | 391 +++- drivers/gpu/drm/i915/gt/selftest_reset.c | 134 +- .../i915_timeline.c => gt/selftest_timeline.c} | 131 +- drivers/gpu/drm/i915/gt/selftest_workarounds.c | 160 +- .../drm/i915/{ => gt}/selftests/mock_timeline.c | 8 +- .../drm/i915/{ => gt}/selftests/mock_timeline.h | 6 +- drivers/gpu/drm/i915/gt/uc/Makefile | 5 + drivers/gpu/drm/i915/{ => gt/uc}/intel_guc.c | 290 ++- drivers/gpu/drm/i915/{ => gt/uc}/intel_guc.h | 33 +- drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ads.c | 29 +- drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ads.h | 0 drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ct.c | 22 +- drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ct.h | 11 +- drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 181 ++ drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_fw.h | 0 drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_fwif.h | 81 +- drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_log.c | 48 +- drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_log.h | 1 - drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_reg.h | 38 +- .../drm/i915/{ => gt/uc}/intel_guc_submission.c | 496 +---- .../drm/i915/{ => gt/uc}/intel_guc_submission.h | 2 - drivers/gpu/drm/i915/{ => gt/uc}/intel_huc.c | 69 +- drivers/gpu/drm/i915/{ => gt/uc}/intel_huc.h | 12 +- drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 53 + drivers/gpu/drm/i915/{ => gt/uc}/intel_huc_fw.h | 0 drivers/gpu/drm/i915/gt/uc/intel_uc.c | 570 ++++++ drivers/gpu/drm/i915/{ => gt/uc}/intel_uc.h | 39 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 540 ++++++ drivers/gpu/drm/i915/{ => gt/uc}/intel_uc_fw.h | 102 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 82 + .../intel_guc.c => gt/uc/selftest_guc.c} | 49 +- drivers/gpu/drm/i915/gvt/gtt.h | 13 +- drivers/gpu/drm/i915/gvt/scheduler.c | 2 +- drivers/gpu/drm/i915/i915_active.c | 321 ++- drivers/gpu/drm/i915/i915_active.h | 28 +- drivers/gpu/drm/i915/i915_active_types.h | 13 +- drivers/gpu/drm/i915/i915_debugfs.c | 217 +-- drivers/gpu/drm/i915/i915_drv.c | 200 +- drivers/gpu/drm/i915/i915_drv.h | 250 +-- drivers/gpu/drm/i915/i915_fixed.h | 5 + drivers/gpu/drm/i915/i915_gem.c | 341 ++-- drivers/gpu/drm/i915/i915_gem_batch_pool.c | 42 +- drivers/gpu/drm/i915/i915_gem_fence_reg.c | 32 + drivers/gpu/drm/i915/i915_gem_fence_reg.h | 3 + drivers/gpu/drm/i915/i915_gem_gtt.c | 2049 ++++++++------------ drivers/gpu/drm/i915/i915_gem_gtt.h | 200 +- drivers/gpu/drm/i915/i915_gem_render_state.h | 31 - drivers/gpu/drm/i915/i915_globals.h | 2 + drivers/gpu/drm/i915/i915_gpu_error.c | 594 +++--- drivers/gpu/drm/i915/i915_gpu_error.h | 71 +- drivers/gpu/drm/i915/i915_irq.c | 803 ++++---- drivers/gpu/drm/i915/i915_irq.h | 45 +- drivers/gpu/drm/i915/i915_params.c | 5 +- drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/i915_pci.c | 43 +- drivers/gpu/drm/i915/i915_perf.c | 371 ++-- drivers/gpu/drm/i915/i915_pmu.c | 4 +- drivers/gpu/drm/i915/i915_priolist_types.h | 10 + drivers/gpu/drm/i915/i915_pvinfo.h | 7 +- drivers/gpu/drm/i915/i915_reg.h | 231 ++- drivers/gpu/drm/i915/i915_request.c | 126 +- drivers/gpu/drm/i915/i915_request.h | 24 +- drivers/gpu/drm/i915/i915_scheduler.c | 4 +- drivers/gpu/drm/i915/i915_scheduler_types.h | 1 + drivers/gpu/drm/i915/i915_selftest.h | 27 +- drivers/gpu/drm/i915/i915_timeline.h | 94 - drivers/gpu/drm/i915/i915_trace.h | 88 +- drivers/gpu/drm/i915/i915_utils.h | 12 + drivers/gpu/drm/i915/i915_vgpu.c | 63 +- drivers/gpu/drm/i915/i915_vgpu.h | 7 +- drivers/gpu/drm/i915/i915_vma.c | 73 +- drivers/gpu/drm/i915/intel_device_info.c | 40 +- drivers/gpu/drm/i915/intel_device_info.h | 5 +- drivers/gpu/drm/i915/intel_drv.h | 37 +- drivers/gpu/drm/i915/intel_guc_fw.c | 308 --- drivers/gpu/drm/i915/intel_gvt.c | 7 +- drivers/gpu/drm/i915/intel_gvt.h | 7 +- drivers/gpu/drm/i915/intel_huc_fw.c | 215 -- drivers/gpu/drm/i915/intel_pm.c | 441 ++--- drivers/gpu/drm/i915/intel_pm.h | 4 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 12 +- drivers/gpu/drm/i915/intel_runtime_pm.h | 2 +- drivers/gpu/drm/i915/intel_uc.c | 561 ------ drivers/gpu/drm/i915/intel_uc_fw.c | 357 ---- drivers/gpu/drm/i915/intel_uncore.c | 465 +++-- drivers/gpu/drm/i915/intel_uncore.h | 24 +- drivers/gpu/drm/i915/intel_wakeref.c | 9 +- drivers/gpu/drm/i915/intel_wakeref.h | 26 +- drivers/gpu/drm/i915/intel_wopcm.c | 40 +- drivers/gpu/drm/i915/intel_wopcm.h | 4 +- drivers/gpu/drm/i915/oa/Makefile | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_bdw.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_bdw.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_bxt.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_bxt.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt2.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt2.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt3.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt3.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_chv.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_chv.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_cnl.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_cnl.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_glk.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_glk.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_hsw.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_hsw.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_icl.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_icl.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt2.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt2.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt3.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt3.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt2.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt2.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt3.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt3.h | 2 +- drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt4.c | 0 drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt4.h | 2 +- drivers/gpu/drm/i915/selftests/i915_active.c | 124 +- drivers/gpu/drm/i915/selftests/i915_gem.c | 11 +- drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 3 +- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +- .../gpu/drm/i915/selftests/i915_live_selftests.h | 2 +- .../gpu/drm/i915/selftests/i915_mock_selftests.h | 2 +- drivers/gpu/drm/i915/selftests/i915_request.c | 43 +- drivers/gpu/drm/i915/selftests/i915_selftest.c | 65 +- drivers/gpu/drm/i915/selftests/i915_vma.c | 10 + drivers/gpu/drm/i915/selftests/igt_flush_test.c | 5 +- drivers/gpu/drm/i915/selftests/igt_reset.c | 38 +- drivers/gpu/drm/i915/selftests/igt_reset.h | 10 +- drivers/gpu/drm/i915/selftests/igt_spinner.c | 8 +- drivers/gpu/drm/i915/selftests/igt_spinner.h | 3 + drivers/gpu/drm/i915/selftests/igt_wedge_me.h | 58 - drivers/gpu/drm/i915/selftests/mock_gem_device.c | 18 +- drivers/gpu/drm/i915/selftests/mock_gtt.c | 3 + drivers/gpu/drm/i915/selftests/mock_uncore.c | 4 +- include/drm/i915_component.h | 2 +- include/drm/i915_drm.h | 13 +- include/drm/i915_pciids.h | 13 +- include/uapi/drm/i915_drm.h | 1 + 248 files changed, 13296 insertions(+), 10562 deletions(-) delete mode 100644 drivers/gpu/drm/i915/Makefile.header-test delete mode 100644 drivers/gpu/drm/i915/display/Makefile.header-test create mode 100644 drivers/gpu/drm/i915/display/intel_tc.c create mode 100644 drivers/gpu/drm/i915/display/intel_tc.h delete mode 100644 drivers/gpu/drm/i915/gem/Makefile.header-test delete mode 100644 drivers/gpu/drm/i915/gt/Makefile.header-test rename drivers/gpu/drm/i915/{intel_renderstate_gen6.c => gt/gen6_renderstate.c} (100%) rename drivers/gpu/drm/i915/{intel_renderstate_gen7.c => gt/gen7_renderstate.c} (100%) rename drivers/gpu/drm/i915/{intel_renderstate_gen8.c => gt/gen8_renderstate.c} (100%) rename drivers/gpu/drm/i915/{intel_renderstate_gen9.c => gt/gen9_renderstate.c} (100%) create mode 100644 drivers/gpu/drm/i915/gt/intel_gt.c create mode 100644 drivers/gpu/drm/i915/gt/intel_gt.h create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_types.h rename drivers/gpu/drm/i915/{i915_gem_render_state.c => gt/intel_renderstate.c} (94%) rename drivers/gpu/drm/i915/{ => gt}/intel_renderstate.h (91%) create mode 100644 drivers/gpu/drm/i915/gt/intel_reset_types.h rename drivers/gpu/drm/i915/{i915_timeline.c => gt/intel_timeline.c} (69%) create mode 100644 drivers/gpu/drm/i915/gt/intel_timeline.h rename drivers/gpu/drm/i915/{i915_timeline_types.h => gt/intel_timeline_types.h} (92%) rename drivers/gpu/drm/i915/{selftests/i915_timeline.c => gt/selftest_timeline.c} (86%) rename drivers/gpu/drm/i915/{ => gt}/selftests/mock_timeline.c (68%) rename drivers/gpu/drm/i915/{ => gt}/selftests/mock_timeline.h (53%) create mode 100644 drivers/gpu/drm/i915/gt/uc/Makefile rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc.c (78%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc.h (90%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ads.c (93%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ads.h (100%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ct.c (97%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_ct.h (93%) create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_fw.h (100%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_fwif.h (88%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_log.c (91%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_log.h (98%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_reg.h (87%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_submission.c (68%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_guc_submission.h (98%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_huc.c (76%) rename drivers/gpu/drm/i915/{ => gt/uc}/intel_huc.h (91%) create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c rename drivers/gpu/drm/i915/{ => gt/uc}/intel_huc_fw.h (100%) create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_uc.c rename drivers/gpu/drm/i915/{ => gt/uc}/intel_uc.h (60%) create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c rename drivers/gpu/drm/i915/{ => gt/uc}/intel_uc_fw.h (57%) create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h rename drivers/gpu/drm/i915/{selftests/intel_guc.c => gt/uc/selftest_guc.c} (85%) delete mode 100644 drivers/gpu/drm/i915/i915_gem_render_state.h delete mode 100644 drivers/gpu/drm/i915/i915_timeline.h delete mode 100644 drivers/gpu/drm/i915/intel_guc_fw.c delete mode 100644 drivers/gpu/drm/i915/intel_huc_fw.c delete mode 100644 drivers/gpu/drm/i915/intel_uc.c delete mode 100644 drivers/gpu/drm/i915/intel_uc_fw.c create mode 100644 drivers/gpu/drm/i915/oa/Makefile rename drivers/gpu/drm/i915/{ => oa}/i915_oa_bdw.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_bdw.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_bxt.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_bxt.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt2.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt2.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt3.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_cflgt3.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_chv.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_chv.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_cnl.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_cnl.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_glk.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_glk.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_hsw.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_hsw.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_icl.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_icl.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt2.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt2.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt3.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_kblgt3.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt2.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt2.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt3.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt3.h (74%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt4.c (100%) rename drivers/gpu/drm/i915/{ => oa}/i915_oa_sklgt4.h (74%) delete mode 100644 drivers/gpu/drm/i915/selftests/igt_wedge_me.h

Message ID	20190801201314.GA23635@intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> Date: Thu, 1 Aug 2019 13:13:14 -0700 From: Rodrigo Vivi <rodrigo.vivi@intel.com> To: Dave Airlie <airlied@gmail.com>, Daniel Vetter <daniel.vetter@ffwll.ch> Message-ID: <20190801201314.GA23635@intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.11.3 (2019-02-01) Subject: [Intel-gfx] [PULL] drm-intel-next Precedence: list Cc: dim-tools@lists.freedesktop.org, Maxime Ripard <maxime.ripard@bootlin.com>, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
Series	[PULL] drm-intel-next \| expand [PULL] drm-intel-next

[PULL] drm-intel-next

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