| Message ID | 20190809222643.23142-7-matthew.auld@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce memory region concept (including device local memory) | expand |
Quoting Matthew Auld (2019-08-09 23:26:12) > From: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > > Exposes available regions for the platform. Shared memory will > always be available. > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/intel_device_info.h | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 39cdf4eac2a6..d947f7415861 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2212,6 +2212,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > > #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc) > > +#define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i)) > + > #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) > > /* Having GuC is not the same as using GuC */ > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h > index 92e0c2e0954c..3166f38910f7 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.h > +++ b/drivers/gpu/drm/i915/intel_device_info.h > @@ -159,6 +159,8 @@ struct intel_device_info { > > unsigned int page_sizes; /* page sizes supported by the HW */ > > + u32 memory_regions; /* regions supported by the HW */ > + > u32 display_mmio_offset; > > u8 num_pipes; If shared memory is always available, why is it absent? Do you plan to distinguish scrubbed and zeroed system pages, private pools to the process etc? -Chris
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 39cdf4eac2a6..d947f7415861 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2212,6 +2212,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc) +#define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i)) + #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) /* Having GuC is not the same as using GuC */ diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 92e0c2e0954c..3166f38910f7 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -159,6 +159,8 @@ struct intel_device_info { unsigned int page_sizes; /* page sizes supported by the HW */ + u32 memory_regions; /* regions supported by the HW */ + u32 display_mmio_offset; u8 num_pipes;