@@ -504,6 +504,19 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
I915_WRITE(EDP_PSR2_CTL(dev_priv->psr.transcoder), val);
}
+static bool
+_trans_support_psr2(struct drm_i915_private *dev_priv, enum transcoder trans)
+{
+ /*
+ * TODO: PSR2 is also supported in TRANSCODER_B on TGL+ but it requires
+ * software tracking
+ */
+ if (INTEL_GEN(dev_priv) >= 12)
+ return trans == TRANSCODER_A;
+ else
+ return trans == TRANSCODER_EDP;
+}
+
static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state)
{
@@ -511,19 +524,13 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;
int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;
int psr_max_h = 0, psr_max_v = 0;
- enum transcoder supported;
if (!dev_priv->psr.sink_psr2_support)
return false;
- /*
- * TODO: PSR2 is also supported in TRANSCODER_B on TGL+ but it requires
- * software tracking
- */
- supported = INTEL_GEN(dev_priv) >= 12 ? TRANSCODER_A : TRANSCODER_EDP;
- if (crtc_state->cpu_transcoder != supported) {
+ if (!_trans_support_psr2(dev_priv, crtc_state->cpu_transcoder)) {
DRM_DEBUG_KMS("PSR2 not supported in transcoder %s\n",
- transcoder_name(supported));
+ transcoder_name(crtc_state->cpu_transcoder));
return false;
}
@@ -629,7 +636,8 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- if (INTEL_GEN(dev_priv) >= 9)
+ if (INTEL_GEN(dev_priv) >= 9 &&
+ _trans_support_psr2(dev_priv, dev_priv->psr.transcoder))
WARN_ON(I915_READ(EDP_PSR2_CTL(dev_priv->psr.transcoder)) & EDP_PSR2_ENABLE);
WARN_ON(I915_READ(EDP_PSR_CTL(dev_priv->psr.transcoder)) & EDP_PSR_ENABLE);
WARN_ON(dev_priv->psr.active);
@@ -783,7 +791,8 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
u32 val;
if (!dev_priv->psr.active) {
- if (INTEL_GEN(dev_priv) >= 9) {
+ if (INTEL_GEN(dev_priv) >= 9 &&
+ _trans_support_psr2(dev_priv, dev_priv->psr.transcoder)) {
val = I915_READ(EDP_PSR2_CTL(dev_priv->psr.transcoder));
WARN_ON(val & EDP_PSR2_ENABLE);
}