| Message ID | 20190823160307.180813-8-stuart.summers@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Refactor to expand subslice mask (rev 2) | expand |
Quoting Stuart Summers (2019-08-23 17:03:03) > Add a subslice stride calculation when setting subslices. This > aligns more closely with the userspace expectation of the subslice > mask structure. > > v2: Use local variable for subslice_mask on HSW and > clean up a few other subslice_mask local variable > changes > v3: Add GEM_BUG_ON for ss_stride to prevent array overflow (Chris) > Split main set function and refactors in intel_device_info.c > into separate patches (Chris) > v4: Reduce ss_stride size check when setting subslices per slice > based on actual expected max stride (Chris) > Move that GEM_BUG_ON check for the ss_stride out to the patch > which adds the ss_stride > v5: Use memcpy instead of looping through each stride index > > Signed-off-by: Stuart Summers <stuart.summers@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c index 3a5db0dbac72..1505042d7b5d 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.c +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c @@ -33,9 +33,11 @@ intel_sseu_subslice_total(const struct sseu_dev_info *sseu) } void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice, - u8 ss_mask) + u32 ss_mask) { - sseu->subslice_mask[slice] = ss_mask; + int offset = slice * sseu->ss_stride; + + memcpy(&sseu->subslice_mask[offset], &ss_mask, sseu->ss_stride); } unsigned int diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h index 7f600f50dedb..73a9064291a2 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.h +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h @@ -79,7 +79,7 @@ unsigned int intel_sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice); void intel_sseu_set_subslices(struct sseu_dev_info *sseu, int slice, - u8 ss_mask); + u32 ss_mask); u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, const struct intel_sseu *req_sseu);
Add a subslice stride calculation when setting subslices. This aligns more closely with the userspace expectation of the subslice mask structure. v2: Use local variable for subslice_mask on HSW and clean up a few other subslice_mask local variable changes v3: Add GEM_BUG_ON for ss_stride to prevent array overflow (Chris) Split main set function and refactors in intel_device_info.c into separate patches (Chris) v4: Reduce ss_stride size check when setting subslices per slice based on actual expected max stride (Chris) Move that GEM_BUG_ON check for the ss_stride out to the patch which adds the ss_stride v5: Use memcpy instead of looping through each stride index Signed-off-by: Stuart Summers <stuart.summers@intel.com> --- drivers/gpu/drm/i915/gt/intel_sseu.c | 6 ++++-- drivers/gpu/drm/i915/gt/intel_sseu.h | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-)