diff mbox series

drm/i915: Whitelist COMMON_SLICE_CHICKEN2

Message ID 20190911014801.26821-1-kenneth@whitecape.org (mailing list archive)
State New, archived
Headers show
Series drm/i915: Whitelist COMMON_SLICE_CHICKEN2 | expand

Commit Message

Kenneth Graunke Sept. 11, 2019, 1:48 a.m. UTC
This allows userspace to use "legacy" mode for push constants, where
they are committed at 3DPRIMITIVE or flush time, rather than being
committed at 3DSTATE_BINDING_TABLE_POINTERS_XS time.  Gen6-8 and Gen11
both use the "legacy" behavior - only Gen9 works in the "new" way.

Conflating push constants with binding tables is painful for userspace,
we would like to be able to avoid doing so.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: stable@vger.kernel.org
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Chris Wilson Sept. 11, 2019, 7:42 a.m. UTC | #1
Quoting Kenneth Graunke (2019-09-11 02:48:01)
> This allows userspace to use "legacy" mode for push constants, where
> they are committed at 3DPRIMITIVE or flush time, rather than being
> committed at 3DSTATE_BINDING_TABLE_POINTERS_XS time.  Gen6-8 and Gen11
> both use the "legacy" behavior - only Gen9 works in the "new" way.
> 
> Conflating push constants with binding tables is painful for userspace,
> we would like to be able to avoid doing so.
> 
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> Cc: stable@vger.kernel.org
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
Chris Wilson Sept. 11, 2019, 8 a.m. UTC | #2
Quoting Chris Wilson (2019-09-11 08:42:22)
> Quoting Kenneth Graunke (2019-09-11 02:48:01)
> > This allows userspace to use "legacy" mode for push constants, where
> > they are committed at 3DPRIMITIVE or flush time, rather than being
> > committed at 3DSTATE_BINDING_TABLE_POINTERS_XS time.  Gen6-8 and Gen11
> > both use the "legacy" behavior - only Gen9 works in the "new" way.
> > 
> > Conflating push constants with binding tables is painful for userspace,
> > we would like to be able to avoid doing so.
> > 
> > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> > Cc: stable@vger.kernel.org
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Pushed. Do you also want to do this for icl?
-Chris
Kenneth Graunke Sept. 11, 2019, 3:22 p.m. UTC | #3
On Wednesday, September 11, 2019 1:00:51 AM PDT Chris Wilson wrote:
> Quoting Chris Wilson (2019-09-11 08:42:22)
> > Quoting Kenneth Graunke (2019-09-11 02:48:01)
> > > This allows userspace to use "legacy" mode for push constants, where
> > > they are committed at 3DPRIMITIVE or flush time, rather than being
> > > committed at 3DSTATE_BINDING_TABLE_POINTERS_XS time.  Gen6-8 and Gen11
> > > both use the "legacy" behavior - only Gen9 works in the "new" way.
> > > 
> > > Conflating push constants with binding tables is painful for userspace,
> > > we would like to be able to avoid doing so.
> > > 
> > > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> > > Cc: stable@vger.kernel.org
> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> 
> Pushed. Do you also want to do this for icl?
> -Chris

Thanks!  I don't think it's necessary for ICL, the bit seems to be gone
and it appears to perform the legacy behavior all the time.

--Ken
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 243d3f77be13..41d0f786e06d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1062,6 +1062,9 @@  static void gen9_whitelist_build(struct i915_wa_list *w)
 
 	/* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl,glk,cfl */
 	whitelist_reg(w, GEN8_HDC_CHICKEN1);
+
+	/* WaSendPushConstantsFromMMIO:skl,bxt */
+	whitelist_reg(w, COMMON_SLICE_CHICKEN2);
 }
 
 static void skl_whitelist_build(struct intel_engine_cs *engine)