From patchwork Wed Sep 25 20:33:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: James Ausmus X-Patchwork-Id: 11161345 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C0A61112B for ; Wed, 25 Sep 2019 20:33:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8D0A21D79 for ; Wed, 25 Sep 2019 20:33:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A8D0A21D79 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 33B046FB5A; Wed, 25 Sep 2019 20:33:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 92F556FB47 for ; Wed, 25 Sep 2019 20:33:24 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Sep 2019 13:33:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,549,1559545200"; d="scan'208";a="179927745" Received: from jausmus-gentoo-dev6.jf.intel.com (HELO jausmus-gentoo-dev6) ([10.54.75.43]) by orsmga007.jf.intel.com with SMTP; 25 Sep 2019 13:33:23 -0700 Received: by jausmus-gentoo-dev6 (sSMTP sendmail emulation); Wed, 25 Sep 2019 13:34:01 -0700 From: James Ausmus To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Sep 2019 13:33:50 -0700 Message-Id: <20190925203352.9827-2-james.ausmus@intel.com> X-Mailer: git-send-email 2.22.1 In-Reply-To: <20190925203352.9827-1-james.ausmus@intel.com> References: <20190925203352.9827-1-james.ausmus@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/3] drm/i915: Extract SAGV block time function X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi , =?utf-8?b?VmlsbGUgU3lyasOk?= =?utf-8?b?bMOk?= Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In prep for newer platforms having more complicated ways to determine the SAGV block time, extract the setting to a separate function. While we're at it, update the if ladder to follow the new gen -> old gen order preference, and warn on any non-specified gen. Cc: Ville Syrjälä Cc: Stanislav Lisovskiy Cc: Lucas De Marchi Signed-off-by: James Ausmus Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6bed2ed14574..5ad72dcb0faa 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3662,6 +3662,23 @@ intel_has_sagv(struct drm_i915_private *dev_priv) dev_priv->sagv_status != I915_SAGV_NOT_CONTROLLED; } +static int +intel_get_sagv_block_time_us(struct drm_i915_private *dev_priv) +{ + int sagv_block_time_us = 1000; /* Default to unusable block time */ + + if (IS_GEN(dev_priv, 11)) + sagv_block_time_us = 10; + else if (IS_GEN(dev_priv, 10)) + sagv_block_time_us = 20; + else if (IS_GEN(dev_priv, 9)) + sagv_block_time_us = 30; + else + MISSING_CASE(INTEL_GEN(dev_priv)); + + return sagv_block_time_us; +} + /* * SAGV dynamically adjusts the system agent voltage and clock frequencies * depending on power and performance requirements. The display engine access @@ -3755,12 +3772,7 @@ bool intel_can_enable_sagv(struct intel_atomic_state *state) if (!intel_has_sagv(dev_priv)) return false; - if (IS_GEN(dev_priv, 9)) - sagv_block_time_us = 30; - else if (IS_GEN(dev_priv, 10)) - sagv_block_time_us = 20; - else - sagv_block_time_us = 10; + sagv_block_time_us = intel_get_sagv_block_time_us(dev_priv); /* * If there are no active CRTCs, no additional checks need be performed