diff mbox series

[RFC,3/6] drm/i915/dp: Preparation for DP phy compliance auto test.

Message ID 20191003150653.15881-4-animesh.manna@intel.com (mailing list archive)
State New, archived
Headers show
Series DP Phy compliace auto test. | expand

Commit Message

Animesh Manna Oct. 3, 2019, 3:06 p.m. UTC 
During DP phy compliance auto test mode, sink will request
combination of different test pattern with differnt level of
vswing, pre-emphasis. Function added to prepare for it.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       | 29 +++++++++++++++++++
 2 files changed, 30 insertions(+)

Comments

Navare, Manasi Oct. 21, 2019, 11:29 p.m. UTC | #1 
On Thu, Oct 03, 2019 at 08:36:50PM +0530, Animesh Manna wrote:
> During DP phy compliance auto test mode, sink will request
> combination of different test pattern with differnt level of
> vswing, pre-emphasis. Function added to prepare for it.
> 
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>

This patch looks good to me, could you add a comment for why
link_mst is set to false?

Manasi

> ---
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_dp.c       | 29 +++++++++++++++++++
>  2 files changed, 30 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 976669f01a8c..5d6d44fa2594 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1142,6 +1142,7 @@ struct intel_dp_compliance_data {
>  	u8 video_pattern;
>  	u16 hdisplay, vdisplay;
>  	u8 bpc;
> +	struct drm_dp_phy_test_params phytest;
>  };
>  
>  struct intel_dp_compliance {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7d33e20dfc87..a19141fc672e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4738,9 +4738,38 @@ static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp)
>  	return test_result;
>  }
>  
> +static u8 intel_dp_prepare_phytest(struct intel_dp *intel_dp)
> +{
> +	struct drm_dp_phy_test_params *data =
> +		&intel_dp->compliance.test_data.phytest;
> +	u8 link_status[DP_LINK_STATUS_SIZE];
> +
> +	if (!drm_dp_get_phy_test_pattern(&intel_dp->aux, data)) {
> +		DRM_DEBUG_KMS("DP Phy Test pattern AUX read failure\n");
> +		return DP_TEST_NAK;
> +	}
> +
> +	if (!intel_dp_get_link_status(intel_dp, link_status)) {
> +		DRM_DEBUG_KMS("failed to get link status\n");
> +		return DP_TEST_NAK;
> +	}
> +
> +	intel_dp->link_mst = false;
> +
> +	/* retrieve vswing & pre-emphasis setting */
> +	intel_get_adjust_train(intel_dp, link_status);
> +
> +	return DP_TEST_ACK;
> +}
> +
>  static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)
>  {
>  	u8 test_result = DP_TEST_NAK;
> +
> +	test_result = intel_dp_prepare_phytest(intel_dp);
> +	if (test_result != DP_TEST_ACK)
> +		DRM_ERROR("Phy test preparation failed\n");
> +
>  	return test_result;
>  }
>  
> -- 
> 2.22.0
>
Animesh Manna Oct. 22, 2019, 2:12 p.m. UTC | #2 
On 10/22/2019 4:59 AM, Manasi Navare wrote:
> On Thu, Oct 03, 2019 at 08:36:50PM +0530, Animesh Manna wrote:
>> During DP phy compliance auto test mode, sink will request
>> combination of different test pattern with differnt level of
>> vswing, pre-emphasis. Function added to prepare for it.
>>
>> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> This patch looks good to me, could you add a comment for why
> link_mst is set to false?

Thanks, link_mst is set to false to avoid executing mst related code 
during compliance testing... will add as comment.

Regards.
Animesh
>
> Manasi
>
>> ---
>>   .../drm/i915/display/intel_display_types.h    |  1 +
>>   drivers/gpu/drm/i915/display/intel_dp.c       | 29 +++++++++++++++++++
>>   2 files changed, 30 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index 976669f01a8c..5d6d44fa2594 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -1142,6 +1142,7 @@ struct intel_dp_compliance_data {
>>   	u8 video_pattern;
>>   	u16 hdisplay, vdisplay;
>>   	u8 bpc;
>> +	struct drm_dp_phy_test_params phytest;
>>   };
>>   
>>   struct intel_dp_compliance {
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 7d33e20dfc87..a19141fc672e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -4738,9 +4738,38 @@ static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp)
>>   	return test_result;
>>   }
>>   
>> +static u8 intel_dp_prepare_phytest(struct intel_dp *intel_dp)
>> +{
>> +	struct drm_dp_phy_test_params *data =
>> +		&intel_dp->compliance.test_data.phytest;
>> +	u8 link_status[DP_LINK_STATUS_SIZE];
>> +
>> +	if (!drm_dp_get_phy_test_pattern(&intel_dp->aux, data)) {
>> +		DRM_DEBUG_KMS("DP Phy Test pattern AUX read failure\n");
>> +		return DP_TEST_NAK;
>> +	}
>> +
>> +	if (!intel_dp_get_link_status(intel_dp, link_status)) {
>> +		DRM_DEBUG_KMS("failed to get link status\n");
>> +		return DP_TEST_NAK;
>> +	}
>> +
>> +	intel_dp->link_mst = false;
>> +
>> +	/* retrieve vswing & pre-emphasis setting */
>> +	intel_get_adjust_train(intel_dp, link_status);
>> +
>> +	return DP_TEST_ACK;
>> +}
>> +
>>   static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)
>>   {
>>   	u8 test_result = DP_TEST_NAK;
>> +
>> +	test_result = intel_dp_prepare_phytest(intel_dp);
>> +	if (test_result != DP_TEST_ACK)
>> +		DRM_ERROR("Phy test preparation failed\n");
>> +
>>   	return test_result;
>>   }
>>   
>> -- 
>> 2.22.0
>>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 976669f01a8c..5d6d44fa2594 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1142,6 +1142,7 @@  struct intel_dp_compliance_data {
 	u8 video_pattern;
 	u16 hdisplay, vdisplay;
 	u8 bpc;
+	struct drm_dp_phy_test_params phytest;
 };
 
 struct intel_dp_compliance {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7d33e20dfc87..a19141fc672e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4738,9 +4738,38 @@  static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp)
 	return test_result;
 }
 
+static u8 intel_dp_prepare_phytest(struct intel_dp *intel_dp)
+{
+	struct drm_dp_phy_test_params *data =
+		&intel_dp->compliance.test_data.phytest;
+	u8 link_status[DP_LINK_STATUS_SIZE];
+
+	if (!drm_dp_get_phy_test_pattern(&intel_dp->aux, data)) {
+		DRM_DEBUG_KMS("DP Phy Test pattern AUX read failure\n");
+		return DP_TEST_NAK;
+	}
+
+	if (!intel_dp_get_link_status(intel_dp, link_status)) {
+		DRM_DEBUG_KMS("failed to get link status\n");
+		return DP_TEST_NAK;
+	}
+
+	intel_dp->link_mst = false;
+
+	/* retrieve vswing & pre-emphasis setting */
+	intel_get_adjust_train(intel_dp, link_status);
+
+	return DP_TEST_ACK;
+}
+
 static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)
 {
 	u8 test_result = DP_TEST_NAK;
+
+	test_result = intel_dp_prepare_phytest(intel_dp);
+	if (test_result != DP_TEST_ACK)
+		DRM_ERROR("Phy test preparation failed\n");
+
 	return test_result;
 }