| Message ID | 20191011200949.7839-9-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Some cleanup near the SKL wm/ddb area | expand |
On Fri, 2019-10-11 at 23:09 +0300, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The dirty_pipes bitmask is now unused. Get rid of it. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 - > drivers/gpu/drm/i915/intel_pm.c | 35 +---------------------------- > ---- > 2 files changed, 1 insertion(+), 35 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h > index eba9055c4405..c16ba85e2ec8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -901,7 +901,6 @@ struct skl_ddb_allocation { > }; > > struct skl_ddb_values { > - unsigned dirty_pipes; > struct skl_ddb_allocation ddb; > }; As you know, I have also removed skl_ddb_allocation however as your patch is not yet on drm-tip, I guess I can't remove skl_ddb_values for now, probably I will just start using dev_priv for enabled_slices for now. If your patch set lands before mine I will then nuke it. So, Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 390d1f8d45ba..ccbb732cff44 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5130,23 +5130,6 @@ static bool skl_plane_wm_equals(struct > drm_i915_private *dev_priv, > return skl_wm_level_equals(&wm1->trans_wm, &wm2->trans_wm); > } > > -static bool skl_pipe_wm_equals(struct intel_crtc *crtc, > - const struct skl_pipe_wm *wm1, > - const struct skl_pipe_wm *wm2) > -{ > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > - enum plane_id plane_id; > - > - for_each_plane_id_on_crtc(crtc, plane_id) { > - if (!skl_plane_wm_equals(dev_priv, > - &wm1->planes[plane_id], > - &wm2->planes[plane_id])) > - return false; > - } > - > - return true; > -} > - > static inline bool skl_ddb_entries_overlap(const struct > skl_ddb_entry *a, > const struct skl_ddb_entry > *b) > { > @@ -5403,8 +5386,6 @@ skl_ddb_add_affected_pipes(struct > intel_atomic_state *state) > * to grab the lock on *all* CRTC's. > */ > if (state->active_pipe_changes || state->modeset) { > - state->wm_results.dirty_pipes = INTEL_INFO(dev_priv)- > >pipe_mask; > - > ret = intel_add_all_pipes(state); > if (ret) > return ret; > @@ -5479,12 +5460,8 @@ skl_compute_wm(struct intel_atomic_state > *state) > struct intel_crtc *crtc; > struct intel_crtc_state *new_crtc_state; > struct intel_crtc_state *old_crtc_state; > - struct skl_ddb_values *results = &state->wm_results; > int ret, i; > > - /* Clear all dirty flags */ > - results->dirty_pipes = 0; > - > ret = skl_ddb_add_affected_pipes(state); > if (ret) > return ret; > @@ -5492,8 +5469,7 @@ skl_compute_wm(struct intel_atomic_state > *state) > /* > * Calculate WM's for all pipes that are part of this > transaction. > * Note that skl_ddb_add_affected_pipes may have added more > CRTC's that > - * weren't otherwise being modified (and set bits in > dirty_pipes) if > - * pipe allocations had to change. > + * weren't otherwise being modified if pipe allocations had to > change. > */ > for_each_oldnew_intel_crtc_in_state(state, crtc, > old_crtc_state, > new_crtc_state, i) { > @@ -5504,11 +5480,6 @@ skl_compute_wm(struct intel_atomic_state > *state) > ret = skl_wm_add_affected_planes(state, crtc); > if (ret) > return ret; > - > - if (!skl_pipe_wm_equals(crtc, > - &old_crtc_state- > >wm.skl.optimal, > - &new_crtc_state- > >wm.skl.optimal)) > - results->dirty_pipes |= BIT(crtc->pipe); > } > > ret = skl_compute_ddb(state); > @@ -5644,7 +5615,6 @@ void skl_pipe_wm_get_hw_state(struct intel_crtc > *crtc, > > void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) > { > - struct skl_ddb_values *hw = &dev_priv->wm.skl_hw; > struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb; > struct intel_crtc *crtc; > struct intel_crtc_state *crtc_state; > @@ -5654,9 +5624,6 @@ void skl_wm_get_hw_state(struct > drm_i915_private *dev_priv) > crtc_state = to_intel_crtc_state(crtc->base.state); > > skl_pipe_wm_get_hw_state(crtc, &crtc_state- > >wm.skl.optimal); > - > - if (crtc->active) > - hw->dirty_pipes |= BIT(crtc->pipe); > } > > if (dev_priv->active_pipes) {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index eba9055c4405..c16ba85e2ec8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -901,7 +901,6 @@ struct skl_ddb_allocation { }; struct skl_ddb_values { - unsigned dirty_pipes; struct skl_ddb_allocation ddb; }; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 390d1f8d45ba..ccbb732cff44 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5130,23 +5130,6 @@ static bool skl_plane_wm_equals(struct drm_i915_private *dev_priv, return skl_wm_level_equals(&wm1->trans_wm, &wm2->trans_wm); } -static bool skl_pipe_wm_equals(struct intel_crtc *crtc, - const struct skl_pipe_wm *wm1, - const struct skl_pipe_wm *wm2) -{ - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - enum plane_id plane_id; - - for_each_plane_id_on_crtc(crtc, plane_id) { - if (!skl_plane_wm_equals(dev_priv, - &wm1->planes[plane_id], - &wm2->planes[plane_id])) - return false; - } - - return true; -} - static inline bool skl_ddb_entries_overlap(const struct skl_ddb_entry *a, const struct skl_ddb_entry *b) { @@ -5403,8 +5386,6 @@ skl_ddb_add_affected_pipes(struct intel_atomic_state *state) * to grab the lock on *all* CRTC's. */ if (state->active_pipe_changes || state->modeset) { - state->wm_results.dirty_pipes = INTEL_INFO(dev_priv)->pipe_mask; - ret = intel_add_all_pipes(state); if (ret) return ret; @@ -5479,12 +5460,8 @@ skl_compute_wm(struct intel_atomic_state *state) struct intel_crtc *crtc; struct intel_crtc_state *new_crtc_state; struct intel_crtc_state *old_crtc_state; - struct skl_ddb_values *results = &state->wm_results; int ret, i; - /* Clear all dirty flags */ - results->dirty_pipes = 0; - ret = skl_ddb_add_affected_pipes(state); if (ret) return ret; @@ -5492,8 +5469,7 @@ skl_compute_wm(struct intel_atomic_state *state) /* * Calculate WM's for all pipes that are part of this transaction. * Note that skl_ddb_add_affected_pipes may have added more CRTC's that - * weren't otherwise being modified (and set bits in dirty_pipes) if - * pipe allocations had to change. + * weren't otherwise being modified if pipe allocations had to change. */ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { @@ -5504,11 +5480,6 @@ skl_compute_wm(struct intel_atomic_state *state) ret = skl_wm_add_affected_planes(state, crtc); if (ret) return ret; - - if (!skl_pipe_wm_equals(crtc, - &old_crtc_state->wm.skl.optimal, - &new_crtc_state->wm.skl.optimal)) - results->dirty_pipes |= BIT(crtc->pipe); } ret = skl_compute_ddb(state); @@ -5644,7 +5615,6 @@ void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc, void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) { - struct skl_ddb_values *hw = &dev_priv->wm.skl_hw; struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb; struct intel_crtc *crtc; struct intel_crtc_state *crtc_state; @@ -5654,9 +5624,6 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) crtc_state = to_intel_crtc_state(crtc->base.state); skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); - - if (crtc->active) - hw->dirty_pipes |= BIT(crtc->pipe); } if (dev_priv->active_pipes) {