diff mbox series

[01/11] drm/i915/tgl: Add IS_TGL_REVID

Message ID 20191015154449.10338-1-mika.kuoppala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [01/11] drm/i915/tgl: Add IS_TGL_REVID | expand

Commit Message

Mika Kuoppala Oct. 15, 2019, 3:44 p.m. UTC
We are going to need this macro on limiting
the workaround scope.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Chris Wilson Oct. 15, 2019, 4:11 p.m. UTC | #1
Quoting Mika Kuoppala (2019-10-15 16:44:39)
> We are going to need this macro on limiting
> the workaround scope.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c46b339064c0..f6aee1e01a7f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1686,6 +1686,11 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define IS_ICL_REVID(p, since, until) \
>         (IS_ICELAKE(p) && IS_REVID(p, since, until))
>  
> +#define TGL_REVID_A0           0x0
> +
> +#define IS_TGL_REVID(p, since, until) \
> +       (IS_TIGERLAKE(p) && IS_REVID(p, since, until))

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c46b339064c0..f6aee1e01a7f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1686,6 +1686,11 @@  IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_ICL_REVID(p, since, until) \
 	(IS_ICELAKE(p) && IS_REVID(p, since, until))
 
+#define TGL_REVID_A0		0x0
+
+#define IS_TGL_REVID(p, since, until) \
+	(IS_TIGERLAKE(p) && IS_REVID(p, since, until))
+
 #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
 #define IS_GEN9_LP(dev_priv)	(IS_GEN(dev_priv, 9) && IS_LP(dev_priv))
 #define IS_GEN9_BC(dev_priv)	(IS_GEN(dev_priv, 9) && !IS_LP(dev_priv))