diff mbox series

drm/i915: Move L3 MOCS to engine reset domain.

Message ID 20191016040558.12862-1-prathap.kumar.valsan@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Move L3 MOCS to engine reset domain. | expand

Commit Message

Kumar Valsan, Prathap Oct. 16, 2019, 4:05 a.m. UTC
Gen12 has L3 MOCS in engine reset domain, having us to re-initialize on
an engine reset.

References: https://bugs.freedesktop.org/show_bug.cgi?id=111723
References: https://bugs.freedesktop.org/show_bug.cgi?id=111645
References: HSDES#1607983814
References: HSDES#14010115701

Signed-off-by: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_mocs.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Chris Wilson Oct. 16, 2019, 8:42 a.m. UTC | #1
Quoting Prathap Kumar Valsan (2019-10-16 05:05:58)
> Gen12 has L3 MOCS in engine reset domain, having us to re-initialize on
> an engine reset.

Hmm, aiui we can do this by removing half of intel_mocs.c...
-Chris
Kumar Valsan, Prathap Oct. 16, 2019, 5:13 p.m. UTC | #2
On Wed, Oct 16, 2019 at 09:42:36AM +0100, Chris Wilson wrote:
> Quoting Prathap Kumar Valsan (2019-10-16 05:05:58)
> > Gen12 has L3 MOCS in engine reset domain, having us to re-initialize on
> > an engine reset.
> 
> Hmm, aiui we can do this by removing half of intel_mocs.c...
Right. Tested "Do initial mocs configuration directly" on Gen12.

Thanks,
Prathap
> -Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 728704bbbe18..774c5df0d0e9 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -365,6 +365,8 @@  static u32 get_entry_control(const struct drm_i915_mocs_table *table,
 	return table->table[I915_MOCS_PTE].control_value;
 }
 
+static void intel_mocs_init_l3cc_table(struct intel_gt *gt);
+
 /**
  * intel_mocs_init_engine() - emit the mocs control table
  * @engine:	The engine for whom to emit the registers.
@@ -380,6 +382,9 @@  void intel_mocs_init_engine(struct intel_engine_cs *engine)
 	unsigned int index;
 	u32 unused_value;
 
+	if (IS_GEN(gt->i915, 12) && engine->class == RENDER_CLASS)
+		intel_mocs_init_l3cc_table(gt);
+
 	/* Platforms with global MOCS do not need per-engine initialization. */
 	if (HAS_GLOBAL_MOCS_REGISTERS(gt->i915))
 		return;