From patchwork Thu Oct 31 10:59:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11220925 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CEBCF15AB for ; Thu, 31 Oct 2019 10:59:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B6C3220862 for ; Thu, 31 Oct 2019 10:59:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B6C3220862 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EE9726EE25; Thu, 31 Oct 2019 10:59:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id A31536EE25 for ; Thu, 31 Oct 2019 10:59:40 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Oct 2019 03:59:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,250,1569308400"; d="scan'208";a="199492297" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga007.fm.intel.com with SMTP; 31 Oct 2019 03:59:38 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 31 Oct 2019 12:59:37 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 31 Oct 2019 12:59:29 +0200 Message-Id: <20191031105929.11594-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191031105929.11594-1-ville.syrjala@linux.intel.com> References: <20191031105929.11594-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Plump dev_priv all the way to icl_{hdr, sdr_y}_plane_mask() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä We're going to need platforms specific decisions in icl_sdr_y_plane_mask(), so let's plumb dev_priv all the way down. For consistency we'll do the same for icl_hdr_plane_mask(). Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- drivers/gpu/drm/i915/display/intel_sprite.c | 4 ++-- drivers/gpu/drm/i915/display/intel_sprite.h | 24 ++++++++++++-------- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 8e1160f8d988..b690ea26cc89 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -9613,7 +9613,7 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state) PIPEMISC_YUV420_MODE_FULL_BLEND; if (INTEL_GEN(dev_priv) >= 11 && - (crtc_state->active_planes & ~(icl_hdr_plane_mask() | + (crtc_state->active_planes & ~(icl_hdr_plane_mask(dev_priv) | BIT(PLANE_CURSOR))) == 0) val |= PIPEMISC_HDR_MODE_PRECISION; @@ -11955,7 +11955,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state) continue; for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, linked) { - if (!icl_is_sdr_y_plane(linked->id)) + if (!icl_is_sdr_y_plane(dev_priv, linked->id)) continue; if (crtc_state->active_planes & BIT(linked->id)) diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index ba344d9e2e19..b486287b9fb1 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -2849,7 +2849,7 @@ static const u32 *icl_get_plane_formats(struct drm_i915_private *dev_priv, if (icl_is_hdr_plane(dev_priv, plane_id)) { *num_formats = ARRAY_SIZE(icl_hdr_plane_formats); return icl_hdr_plane_formats; - } else if (icl_is_sdr_y_plane(plane_id)) { + } else if (icl_is_sdr_y_plane(dev_priv, plane_id)) { *num_formats = ARRAY_SIZE(icl_sdr_y_plane_formats); return icl_sdr_y_plane_formats; } else { @@ -2910,7 +2910,7 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, plane->get_hw_state = skl_plane_get_hw_state; plane->check_plane = skl_plane_check; plane->min_cdclk = skl_plane_min_cdclk; - if (icl_is_sdr_y_plane(plane_id)) + if (icl_is_sdr_y_plane(dev_priv, plane_id)) plane->update_slave = icl_update_slave; if (INTEL_GEN(dev_priv) >= 11) diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h b/drivers/gpu/drm/i915/display/intel_sprite.h index ffb03ee640ed..d9efac5e157f 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.h +++ b/drivers/gpu/drm/i915/display/intel_sprite.h @@ -32,27 +32,33 @@ struct intel_plane * skl_universal_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id); -static inline u8 icl_sdr_y_plane_mask(void) +static inline u8 icl_sdr_y_plane_mask(struct drm_i915_private *dev_priv) { - return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5); + if (INTEL_GEN(dev_priv) >= 11) + return BIT(PLANE_SPRITE4) | BIT(PLANE_SPRITE5); + else + return 0; } -static inline bool icl_is_sdr_y_plane(enum plane_id id) +static inline bool icl_is_sdr_y_plane(struct drm_i915_private *dev_priv, + enum plane_id plane_id) { - return icl_sdr_y_plane_mask() & BIT(id); + return icl_sdr_y_plane_mask(dev_priv) & BIT(plane_id); } -static inline u8 icl_hdr_plane_mask(void) +static inline u8 icl_hdr_plane_mask(struct drm_i915_private *dev_priv) { - return BIT(PLANE_PRIMARY) | - BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1); + if (INTEL_GEN(dev_priv) >= 11) + return BIT(PLANE_PRIMARY) | + BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1); + else + return 0; } static inline bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id) { - return INTEL_GEN(dev_priv) >= 11 && - icl_hdr_plane_mask() & BIT(plane_id); + return icl_hdr_plane_mask(dev_priv) & BIT(plane_id); } int ivb_plane_min_cdclk(const struct intel_crtc_state *crtc_state,