diff mbox series

[v5] drm/i915: FB backing gem obj should reside in LMEM

Message ID 20191105144414.30470-1-ramalingam.c@intel.com (mailing list archive)
State New, archived
Headers show
Series [v5] drm/i915: FB backing gem obj should reside in LMEM | expand

Commit Message

Ramalingam C Nov. 5, 2019, 2:44 p.m. UTC
If Local memory is supported by hardware, we want framebuffer backing
gem objects from local memory.

if the backing obj is not from LMEM, pin_to_display is failed.

v2:
  memory regions are correctly assigned to obj->memory_regions [tvrtko]
  migration failure is reported as debug log [Tvrtko]
v3:
  Migration is dropped. only error is reported [Daniel]
  mem region check is move to pin_to_display [Chris]
v4:
  s/dev_priv/i915 [chris]
v5:
  i915_gem_object_is_lmem is used for detecting the obj mem type. [Matt]

cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_domain.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Chris Wilson Nov. 7, 2019, 10:10 a.m. UTC | #1
Quoting Ramalingam C (2019-11-05 14:44:14)
> If Local memory is supported by hardware, we want framebuffer backing
> gem objects from local memory.
> 
> if the backing obj is not from LMEM, pin_to_display is failed.
> 
> v2:
>   memory regions are correctly assigned to obj->memory_regions [tvrtko]
>   migration failure is reported as debug log [Tvrtko]
> v3:
>   Migration is dropped. only error is reported [Daniel]
>   mem region check is move to pin_to_display [Chris]
> v4:
>   s/dev_priv/i915 [chris]
> v5:
>   i915_gem_object_is_lmem is used for detecting the obj mem type. [Matt]
> 
> cc: Matthew Auld <matthew.auld@intel.com>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_domain.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> index 9937b4c341f1..b6b5c4348396 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> @@ -12,6 +12,7 @@
>  #include "i915_gem_ioctls.h"
>  #include "i915_gem_object.h"
>  #include "i915_vma.h"
> +#include "i915_gem_lmem.h"
>  
>  static void __i915_gem_object_flush_for_display(struct drm_i915_gem_object *obj)
>  {
> @@ -419,11 +420,19 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>                                      const struct i915_ggtt_view *view,
>                                      unsigned int flags)
>  {
> +       struct drm_i915_private *i915 = to_i915(obj->base.dev);
>         struct i915_vma *vma;
>         int ret;
>  
>         assert_object_held(obj);
>  
> +       /* GEM Obj for frame buffer is expected to be in LMEM. */
> +       if (HAS_LMEM(i915))
> +               if (!i915_gem_object_is_lmem(obj)) {
> +                       DRM_DEBUG_KMS("OBJ is not from LMEM\n");
> +                       return ERR_PTR(-EINVAL);
> +               }

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 9937b4c341f1..b6b5c4348396 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -12,6 +12,7 @@ 
 #include "i915_gem_ioctls.h"
 #include "i915_gem_object.h"
 #include "i915_vma.h"
+#include "i915_gem_lmem.h"
 
 static void __i915_gem_object_flush_for_display(struct drm_i915_gem_object *obj)
 {
@@ -419,11 +420,19 @@  i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 				     const struct i915_ggtt_view *view,
 				     unsigned int flags)
 {
+	struct drm_i915_private *i915 = to_i915(obj->base.dev);
 	struct i915_vma *vma;
 	int ret;
 
 	assert_object_held(obj);
 
+	/* GEM Obj for frame buffer is expected to be in LMEM. */
+	if (HAS_LMEM(i915))
+		if (!i915_gem_object_is_lmem(obj)) {
+			DRM_DEBUG_KMS("OBJ is not from LMEM\n");
+			return ERR_PTR(-EINVAL);
+		}
+
 	/*
 	 * The display engine is not coherent with the LLC cache on gen6.  As
 	 * a result, we make sure that the pinning that is about to occur is