From patchwork Thu Nov 7 15:17:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11233181 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BDBF6112B for ; Thu, 7 Nov 2019 15:18:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A68012085B for ; Thu, 7 Nov 2019 15:18:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A68012085B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 280496F6EF; Thu, 7 Nov 2019 15:18:06 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8494E6F6ED; Thu, 7 Nov 2019 15:18:04 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Nov 2019 07:18:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,278,1569308400"; d="scan'208";a="201064842" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga008.fm.intel.com with SMTP; 07 Nov 2019 07:18:01 -0800 Received: by stinkbox (sSMTP sendmail emulation); Thu, 07 Nov 2019 17:18:01 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 7 Nov 2019 17:17:22 +0200 Message-Id: <20191107151725.10507-10-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191107151725.10507-1-ville.syrjala@linux.intel.com> References: <20191107151725.10507-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/12] drm/i915: Clean up integer types in color code X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä A variable called 'i' having an unsigned type is just looking for trouble, and using a sized type generally makes no sense either. Change all of them to just plain old int. And do the same for some 'lut_size' variables which generally provide the loop end codition for 'i'. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++------------ 1 file changed, 19 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 30c0b939620c..d6a20d7522a9 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -713,9 +713,8 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; - const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; + int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data; - u32 i; /* * When setting the auto-increment bit, the hardware seems to @@ -752,8 +751,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; - const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; - u32 i; + int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; /* * When setting the auto-increment bit, the hardware seems to @@ -837,7 +835,7 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state) const struct drm_color_lut *lut = blob->data; struct intel_dsb *dsb = intel_dsb_get(crtc); enum pipe pipe = crtc->pipe; - u32 i; + int i; /* * Program Super Fine segment (let's call it seg1)... @@ -870,7 +868,7 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state) const struct drm_color_lut *entry; struct intel_dsb *dsb = intel_dsb_get(crtc); enum pipe pipe = crtc->pipe; - u32 i; + int i; /* * Program Fine segment (let's call it seg2)... @@ -1643,7 +1641,7 @@ bool intel_color_lut_equal(struct drm_property_blob *blob1, } /* convert hw value with given bit_precision to lut property val */ -static u32 intel_color_lut_pack(u32 val, u32 bit_precision) +static u32 intel_color_lut_pack(u32 val, int bit_precision) { u32 max = 0xffff >> (16 - bit_precision); @@ -1663,7 +1661,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state) enum pipe pipe = crtc->pipe; struct drm_property_blob *blob; struct drm_color_lut *lut; - u32 i, val; + int i; blob = drm_property_create_blob(&dev_priv->drm, sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH, @@ -1674,7 +1672,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state) lut = blob->data; for (i = 0; i < LEGACY_LUT_LENGTH; i++) { - val = I915_READ(PALETTE(pipe, i)); + u32 val = I915_READ(PALETTE(pipe, i)); lut[i].red = intel_color_lut_pack(REG_FIELD_GET( LGC_PALETTE_RED_MASK, val), 8); @@ -1700,11 +1698,10 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; + int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; enum pipe pipe = crtc->pipe; struct drm_property_blob *blob; struct drm_color_lut *lut; - u32 i, val1, val2; blob = drm_property_create_blob(&dev_priv->drm, sizeof(struct drm_color_lut) * lut_size, @@ -1715,8 +1712,8 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state) lut = blob->data; for (i = 0; i < lut_size - 1; i++) { - val1 = I915_READ(PALETTE(pipe, 2 * i + 0)); - val2 = I915_READ(PALETTE(pipe, 2 * i + 1)); + u32 val1 = I915_READ(PALETTE(pipe, 2 * i + 0)); + u32 val2 = I915_READ(PALETTE(pipe, 2 * i + 1)); lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 | REG_FIELD_GET(PALETTE_RED_MASK, val1); @@ -1752,11 +1749,10 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; + int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; enum pipe pipe = crtc->pipe; struct drm_property_blob *blob; struct drm_color_lut *lut; - u32 i, val; blob = drm_property_create_blob(&dev_priv->drm, sizeof(struct drm_color_lut) * lut_size, @@ -1767,6 +1763,8 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state) lut = blob->data; for (i = 0; i < lut_size; i++) { + u32 val; + val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 0)); lut[i].green = intel_color_lut_pack(REG_FIELD_GET( CGM_PIPE_GAMMA_GREEN_MASK, val), 10); @@ -1797,7 +1795,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state) enum pipe pipe = crtc->pipe; struct drm_property_blob *blob; struct drm_color_lut *lut; - u32 i, val; + int i; blob = drm_property_create_blob(&dev_priv->drm, sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH, @@ -1808,7 +1806,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state) lut = blob->data; for (i = 0; i < LEGACY_LUT_LENGTH; i++) { - val = I915_READ(LGC_PALETTE(pipe, i)); + u32 val = I915_READ(LGC_PALETTE(pipe, i)); lut[i].red = intel_color_lut_pack(REG_FIELD_GET( LGC_PALETTE_RED_MASK, val), 8); @@ -1826,11 +1824,10 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; + int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; enum pipe pipe = crtc->pipe; struct drm_property_blob *blob; struct drm_color_lut *lut; - u32 i, val; blob = drm_property_create_blob(&dev_priv->drm, sizeof(struct drm_color_lut) * lut_size, @@ -1841,7 +1838,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state) lut = blob->data; for (i = 0; i < lut_size; i++) { - val = I915_READ(PREC_PALETTE(pipe, i)); + u32 val = I915_READ(PREC_PALETTE(pipe, i)); lut[i].red = intel_color_lut_pack(REG_FIELD_GET( PREC_PALETTE_RED_MASK, val), 10); @@ -1873,11 +1870,10 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - int hw_lut_size = ivb_lut_10_size(prec_index); + int i, hw_lut_size = ivb_lut_10_size(prec_index); enum pipe pipe = crtc->pipe; struct drm_property_blob *blob; struct drm_color_lut *lut; - u32 i, val; blob = drm_property_create_blob(&dev_priv->drm, sizeof(struct drm_color_lut) * hw_lut_size, @@ -1891,7 +1887,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index) PAL_PREC_AUTO_INCREMENT); for (i = 0; i < hw_lut_size; i++) { - val = I915_READ(PREC_PAL_DATA(pipe)); + u32 val = I915_READ(PREC_PAL_DATA(pipe)); lut[i].red = intel_color_lut_pack(REG_FIELD_GET( PREC_PAL_DATA_RED_MASK, val), 10);