diff mbox series

[2/4] drm/i915: Relocate intel_crtc_active()

Message ID 20191112163812.22075-2-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/4] drm/i915/fbc: Nuke bogus single pipe fbc1 restriction | expand

Commit Message

Ville Syrjala Nov. 12, 2019, 4:38 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move intel_crtc_active() next to its only remaining
user (pre-g4x wm code).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 19 -------------------
 drivers/gpu/drm/i915/display/intel_display.h |  1 -
 drivers/gpu/drm/i915/intel_pm.c              | 19 +++++++++++++++++++
 3 files changed, 19 insertions(+), 20 deletions(-)

Comments

Lucas De Marchi Nov. 13, 2019, 6:29 a.m. UTC | #1
On Tue, Nov 12, 2019 at 8:38 AM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move intel_crtc_active() next to its only remaining
> user (pre-g4x wm code).
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 19 -------------------
>  drivers/gpu/drm/i915/display/intel_display.h |  1 -
>  drivers/gpu/drm/i915/intel_pm.c              | 19 +++++++++++++++++++
>  3 files changed, 19 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 81287ff438db..e7e5497e6f2e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1040,25 +1040,6 @@ bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
>                                   NULL, best_clock);
>  }
>
> -bool intel_crtc_active(struct intel_crtc *crtc)
> -{
> -       /* Be paranoid as we can arrive here with only partial
> -        * state retrieved from the hardware during setup.
> -        *
> -        * We can ditch the adjusted_mode.crtc_clock check as soon
> -        * as Haswell has gained clock readout/fastboot support.
> -        *
> -        * We can ditch the crtc->primary->state->fb check as soon as we can
> -        * properly reconstruct framebuffers.
> -        *
> -        * FIXME: The intel_crtc->active here should be switched to
> -        * crtc->state->active once we have proper CRTC states wired up
> -        * for atomic.
> -        */
> -       return crtc->active && crtc->base.primary->state->fb &&
> -               crtc->config->hw.adjusted_mode.crtc_clock;
> -}
> -
>  enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
>                                              enum pipe pipe)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index a5ec5eeff056..d18dc260fe83 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -558,7 +558,6 @@ bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
>                         struct dpll *best_clock);
>  int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
>
> -bool intel_crtc_active(struct intel_crtc *crtc);
>  bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
>  void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
>  void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 2d389e437e87..d5e9b935f4e7 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -806,6 +806,25 @@ static bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
>                 return plane_state->uapi.visible;
>  }
>
> +static bool intel_crtc_active(struct intel_crtc *crtc)

maybe shouldn't have an intel_ prefix... ?

anyway

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

> +{
> +       /* Be paranoid as we can arrive here with only partial
> +        * state retrieved from the hardware during setup.
> +        *
> +        * We can ditch the adjusted_mode.crtc_clock check as soon
> +        * as Haswell has gained clock readout/fastboot support.
> +        *
> +        * We can ditch the crtc->primary->state->fb check as soon as we can
> +        * properly reconstruct framebuffers.
> +        *
> +        * FIXME: The intel_crtc->active here should be switched to
> +        * crtc->state->active once we have proper CRTC states wired up
> +        * for atomic.
> +        */
> +       return crtc->active && crtc->base.primary->state->fb &&
> +               crtc->config->hw.adjusted_mode.crtc_clock;
> +}
> +
>  static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
>  {
>         struct intel_crtc *crtc, *enabled = NULL;
> --
> 2.23.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 81287ff438db..e7e5497e6f2e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1040,25 +1040,6 @@  bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
 				  NULL, best_clock);
 }
 
-bool intel_crtc_active(struct intel_crtc *crtc)
-{
-	/* Be paranoid as we can arrive here with only partial
-	 * state retrieved from the hardware during setup.
-	 *
-	 * We can ditch the adjusted_mode.crtc_clock check as soon
-	 * as Haswell has gained clock readout/fastboot support.
-	 *
-	 * We can ditch the crtc->primary->state->fb check as soon as we can
-	 * properly reconstruct framebuffers.
-	 *
-	 * FIXME: The intel_crtc->active here should be switched to
-	 * crtc->state->active once we have proper CRTC states wired up
-	 * for atomic.
-	 */
-	return crtc->active && crtc->base.primary->state->fb &&
-		crtc->config->hw.adjusted_mode.crtc_clock;
-}
-
 enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
 					     enum pipe pipe)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index a5ec5eeff056..d18dc260fe83 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -558,7 +558,6 @@  bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
 			struct dpll *best_clock);
 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
 
-bool intel_crtc_active(struct intel_crtc *crtc);
 bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
 void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
 void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2d389e437e87..d5e9b935f4e7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -806,6 +806,25 @@  static bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
 		return plane_state->uapi.visible;
 }
 
+static bool intel_crtc_active(struct intel_crtc *crtc)
+{
+	/* Be paranoid as we can arrive here with only partial
+	 * state retrieved from the hardware during setup.
+	 *
+	 * We can ditch the adjusted_mode.crtc_clock check as soon
+	 * as Haswell has gained clock readout/fastboot support.
+	 *
+	 * We can ditch the crtc->primary->state->fb check as soon as we can
+	 * properly reconstruct framebuffers.
+	 *
+	 * FIXME: The intel_crtc->active here should be switched to
+	 * crtc->state->active once we have proper CRTC states wired up
+	 * for atomic.
+	 */
+	return crtc->active && crtc->base.primary->state->fb &&
+		crtc->config->hw.adjusted_mode.crtc_clock;
+}
+
 static struct intel_crtc *single_enabled_crtc(struct drm_i915_private *dev_priv)
 {
 	struct intel_crtc *crtc, *enabled = NULL;