From patchwork Wed Nov 13 15:49:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 11242157 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA2FC1390 for ; Wed, 13 Nov 2019 15:49:34 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C1D5F22C9F for ; Wed, 13 Nov 2019 15:49:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C1D5F22C9F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9290B6ED77; Wed, 13 Nov 2019 15:49:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 045886ED6B; Wed, 13 Nov 2019 15:49:26 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2019 07:49:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,300,1569308400"; d="scan'208";a="207489128" Received: from rosetta.fi.intel.com ([10.237.72.194]) by orsmga003.jf.intel.com with ESMTP; 13 Nov 2019 07:49:25 -0800 Received: by rosetta.fi.intel.com (Postfix, from userid 1000) id 76B7E8402E3; Wed, 13 Nov 2019 17:49:17 +0200 (EET) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Wed, 13 Nov 2019 17:49:10 +0200 Message-Id: <20191113154913.8787-4-mika.kuoppala@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191113154913.8787-1-mika.kuoppala@linux.intel.com> References: <20191113154913.8787-1-mika.kuoppala@linux.intel.com> Subject: [Intel-gfx] [PATCH i-g-t 4/7] tests/i915: Skip if secure batches is not available X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: igt-dev@lists.freedesktop.org, Kuoppala@rosetta.fi.intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: "Kuoppala, Mika" If we can't do secure execbuf, there is no point in trying. Signed-off-by: Kuoppala, Mika --- tests/i915/gem_exec_params.c | 16 ++++++++++++++++ tests/i915/gem_mocs_settings.c | 14 ++++++++++++++ tests/perf_pmu.c | 11 +++++++++++ 3 files changed, 41 insertions(+) diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c index 8f15e645..c5517b07 100644 --- a/tests/i915/gem_exec_params.c +++ b/tests/i915/gem_exec_params.c @@ -193,6 +193,19 @@ static void test_batch_first(int fd) gem_close(fd, obj[0].handle); } +static int has_secure_batches(const int fd) +{ + int v = -1; + drm_i915_getparam_t gp; + + gp.param = I915_PARAM_HAS_SECURE_BATCHES; + gp.value = &v; + + igt_assert_eq(drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp), 0); + + return v; +} + struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 gem_exec[1]; uint32_t batch[2] = {MI_BATCH_BUFFER_END}; @@ -340,6 +353,8 @@ igt_main } igt_subtest("secure-non-root") { + igt_require(has_secure_batches(fd)); + igt_fork(child, 1) { igt_drop_root(); @@ -352,6 +367,7 @@ igt_main igt_subtest("secure-non-master") { igt_require(__igt_device_set_master(fd) == 0); /* Requires root privilege */ + igt_require(has_secure_batches(fd)); igt_device_drop_master(fd); execbuf.flags = I915_EXEC_RENDER | I915_EXEC_SECURE; diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c index fc2ccb21..82eb8a3f 100644 --- a/tests/i915/gem_mocs_settings.c +++ b/tests/i915/gem_mocs_settings.c @@ -225,6 +225,19 @@ static uint32_t get_engine_base(int fd, uint32_t engine) } } +static int has_secure_batches(const int fd) +{ + int v = -1; + drm_i915_getparam_t gp; + + gp.param = I915_PARAM_HAS_SECURE_BATCHES; + gp.value = &v; + + igt_assert_eq(drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp), 0); + + return v; +} + #define MI_STORE_REGISTER_MEM_64_BIT_ADDR ((0x24 << 23) | 2) static int create_read_batch(struct drm_i915_gem_relocation_entry *reloc, @@ -566,6 +579,7 @@ igt_main igt_require_gem(fd); gem_require_mocs_registers(fd); igt_require(get_mocs_settings(fd, &table, false)); + igt_require(has_secure_batches(fd)); } for (e = intel_execution_engines; e->name; e++) { diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c index e2bd2cc5..296d04c6 100644 --- a/tests/perf_pmu.c +++ b/tests/perf_pmu.c @@ -893,6 +893,16 @@ static int wait_vblank(int fd, union drm_wait_vblank *vbl) return err; } +static int has_secure_batches(const int fd) +{ + int v = -1; + drm_i915_getparam_t gp; + gp.param = I915_PARAM_HAS_SECURE_BATCHES; + gp.value = &v; + igt_assert_eq(drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp), 0); + return v; +} + static void event_wait(int gem_fd, const struct intel_execution_engine2 *e) { @@ -910,6 +920,7 @@ event_wait(int gem_fd, const struct intel_execution_engine2 *e) devid = intel_get_drm_devid(gem_fd); igt_require(intel_gen(devid) >= 7); + igt_require(has_secure_batches(fd)); igt_skip_on(IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)); kmstest_set_vt_graphics_mode();