| Message ID | 20191122141049.25608-1-stanislav.lisovskiy@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] drm/i915: Support more QGV points | expand |
On Fri, Nov 22, 2019 at 04:10:49PM +0200, Stanislav Lisovskiy wrote: > According to BSpec 53998, there is a mask of > max 8 SAGV/QGV points we need to support. > > Bumping this up to keep the CI happy(currently > preventing tests to run), until all SAGV > changes land. > > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189 > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_bw.c | 22 +++++++++++++++++----- > drivers/gpu/drm/i915/i915_drv.h | 6 +++++- > 2 files changed, 22 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c > index 86e75e858008..d1b805b30177 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -15,7 +15,7 @@ struct intel_qgv_point { > }; > > struct intel_qgv_info { > - struct intel_qgv_point points[3]; > + struct intel_qgv_point points[I915_NUM_SAGV_POINTS]; > u8 num_points; > u8 num_channels; > u8 t_bl; > @@ -276,15 +276,27 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv) > static unsigned int intel_max_data_rate(struct drm_i915_private *dev_priv, > int num_planes) > { > - if (INTEL_GEN(dev_priv) >= 11) > + if (INTEL_GEN(dev_priv) >= 11) { > + /* > + * Any bw group has same amount of QGV points > + */ > + const struct intel_bw_info *bi = > + &dev_priv->max_bw[0]; > + unsigned int min_bw = UINT_MAX; > + int i; > + > /* > * FIXME with SAGV disabled maybe we can assume > * point 1 will always be used? Seems to match > * the behaviour observed in the wild. > */ > - return min3(icl_max_bw(dev_priv, num_planes, 0), > - icl_max_bw(dev_priv, num_planes, 1), > - icl_max_bw(dev_priv, num_planes, 2)); > + for (i = 0; i < bi->num_qgv_points; i++) { > + unsigned int bw = icl_max_bw(dev_priv, num_planes, i); > + > + min_bw = min(bw, min_bw); > + } > + return min_bw; > + } > else > return UINT_MAX; > } > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index fdae5a919bc8..d45a9ffaed4f 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -621,6 +621,9 @@ struct i915_gem_mm { > > #define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no recovery? */ > > +/* BSpec precisely defines this */ > +#define I915_NUM_SAGV_POINTS 8 I think everything else talks about "QGV points" rather than "SAGV points" now? Would be nice to be consistent. Apart from that Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > + > struct ddi_vbt_port_info { > /* Non-NULL if port present. */ > const struct child_device_config *child; > @@ -1232,7 +1235,8 @@ struct drm_i915_private { > } dram_info; > > struct intel_bw_info { > - unsigned int deratedbw[3]; /* for each QGV point */ > + /* for each QGV point */ > + unsigned int deratedbw[I915_NUM_SAGV_POINTS]; > u8 num_qgv_points; > u8 num_planes; > } max_bw[6]; > -- > 2.17.1
On Mon, 2019-11-25 at 17:31 +0200, Ville Syrjälä wrote: > On Fri, Nov 22, 2019 at 04:10:49PM +0200, Stanislav Lisovskiy wrote: > > According to BSpec 53998, there is a mask of > > max 8 SAGV/QGV points we need to support. > > > > Bumping this up to keep the CI happy(currently > > preventing tests to run), until all SAGV > > changes land. > > > > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189 > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_bw.c | 22 +++++++++++++++++-- > > --- > > drivers/gpu/drm/i915/i915_drv.h | 6 +++++- > > 2 files changed, 22 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c > > b/drivers/gpu/drm/i915/display/intel_bw.c > > index 86e75e858008..d1b805b30177 100644 > > --- a/drivers/gpu/drm/i915/display/intel_bw.c > > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > > @@ -15,7 +15,7 @@ struct intel_qgv_point { > > }; > > > > struct intel_qgv_info { > > - struct intel_qgv_point points[3]; > > + struct intel_qgv_point points[I915_NUM_SAGV_POINTS]; > > u8 num_points; > > u8 num_channels; > > u8 t_bl; > > @@ -276,15 +276,27 @@ void intel_bw_init_hw(struct drm_i915_private > > *dev_priv) > > static unsigned int intel_max_data_rate(struct drm_i915_private > > *dev_priv, > > int num_planes) > > { > > - if (INTEL_GEN(dev_priv) >= 11) > > + if (INTEL_GEN(dev_priv) >= 11) { > > + /* > > + * Any bw group has same amount of QGV points > > + */ > > + const struct intel_bw_info *bi = > > + &dev_priv->max_bw[0]; > > + unsigned int min_bw = UINT_MAX; > > + int i; > > + > > /* > > * FIXME with SAGV disabled maybe we can assume > > * point 1 will always be used? Seems to match > > * the behaviour observed in the wild. > > */ > > - return min3(icl_max_bw(dev_priv, num_planes, 0), > > - icl_max_bw(dev_priv, num_planes, 1), > > - icl_max_bw(dev_priv, num_planes, 2)); > > + for (i = 0; i < bi->num_qgv_points; i++) { > > + unsigned int bw = icl_max_bw(dev_priv, > > num_planes, i); > > + > > + min_bw = min(bw, min_bw); > > + } > > + return min_bw; > > + } > > else > > return UINT_MAX; > > } > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > b/drivers/gpu/drm/i915/i915_drv.h > > index fdae5a919bc8..d45a9ffaed4f 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -621,6 +621,9 @@ struct i915_gem_mm { > > > > #define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no > > recovery? */ > > > > +/* BSpec precisely defines this */ > > +#define I915_NUM_SAGV_POINTS 8 > > I think everything else talks about "QGV points" rather > than "SAGV points" now? Would be nice to be consistent. Agree, _SAGV_ is not that accurate here. Will change the naming. Stan > > Apart from that > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > + > > struct ddi_vbt_port_info { > > /* Non-NULL if port present. */ > > const struct child_device_config *child; > > @@ -1232,7 +1235,8 @@ struct drm_i915_private { > > } dram_info; > > > > struct intel_bw_info { > > - unsigned int deratedbw[3]; /* for each QGV point */ > > + /* for each QGV point */ > > + unsigned int deratedbw[I915_NUM_SAGV_POINTS]; > > u8 num_qgv_points; > > u8 num_planes; > > } max_bw[6]; > > -- > > 2.17.1 > >
Hi, > -----Original Message----- > From: Lisovskiy, Stanislav <stanislav.lisovskiy@intel.com> > Sent: maanantai 25. marraskuuta 2019 17.55 > To: ville.syrjala@linux.intel.com > Cc: Saarinen, Jani <jani.saarinen@intel.com>; intel-gfx@lists.freedesktop.org; > Roper, Matthew D <matthew.d.roper@intel.com>; jani.nikula@linux.intel.com; > Sarvela, Tomi P <tomi.p.sarvela@intel.com> > Subject: Re: [PATCH v2] drm/i915: Support more QGV points > > On Mon, 2019-11-25 at 17:31 +0200, Ville Syrjälä wrote: > > On Fri, Nov 22, 2019 at 04:10:49PM +0200, Stanislav Lisovskiy wrote: > > > According to BSpec 53998, there is a mask of max 8 SAGV/QGV points > > > we need to support. > > > > > > Bumping this up to keep the CI happy(currently preventing tests to > > > run), until all SAGV changes land. > > > > > > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189 > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_bw.c | 22 +++++++++++++++++-- > > > --- > > > drivers/gpu/drm/i915/i915_drv.h | 6 +++++- > > > 2 files changed, 22 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c > > > b/drivers/gpu/drm/i915/display/intel_bw.c > > > index 86e75e858008..d1b805b30177 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_bw.c > > > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > > > @@ -15,7 +15,7 @@ struct intel_qgv_point { }; > > > > > > struct intel_qgv_info { > > > - struct intel_qgv_point points[3]; > > > + struct intel_qgv_point points[I915_NUM_SAGV_POINTS]; > > > u8 num_points; > > > u8 num_channels; > > > u8 t_bl; > > > @@ -276,15 +276,27 @@ void intel_bw_init_hw(struct drm_i915_private > > > *dev_priv) > > > static unsigned int intel_max_data_rate(struct drm_i915_private > > > *dev_priv, > > > int > num_planes) > > > { > > > - if (INTEL_GEN(dev_priv) >= 11) > > > + if (INTEL_GEN(dev_priv) >= 11) { > > > + /* > > > + * Any bw group has same amount of QGV points > > > + */ > > > + const struct intel_bw_info *bi = > > > + &dev_priv->max_bw[0]; > > > + unsigned int min_bw = UINT_MAX; > > > + int i; > > > + > > > /* > > > * FIXME with SAGV disabled maybe we can assume > > > * point 1 will always be used? Seems to match > > > * the behaviour observed in the wild. > > > */ > > > - return min3(icl_max_bw(dev_priv, num_planes, 0), > > > - icl_max_bw(dev_priv, num_planes, > 1), > > > - icl_max_bw(dev_priv, num_planes, > 2)); > > > + for (i = 0; i < bi->num_qgv_points; i++) { > > > + unsigned int bw = icl_max_bw(dev_priv, > > > num_planes, i); > > > + > > > + min_bw = min(bw, min_bw); > > > + } > > > + return min_bw; > > > + } > > > else > > > return UINT_MAX; > > > } > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > > b/drivers/gpu/drm/i915/i915_drv.h index fdae5a919bc8..d45a9ffaed4f > > > 100644 > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > @@ -621,6 +621,9 @@ struct i915_gem_mm { > > > > > > #define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no > > > recovery? */ > > > > > > +/* BSpec precisely defines this */ > > > +#define I915_NUM_SAGV_POINTS 8 > > > > I think everything else talks about "QGV points" rather than "SAGV > > points" now? Would be nice to be consistent. > > Agree, _SAGV_ is not that accurate here. > Will change the naming. Can we do that while merging? > > Stan > > > > > Apart from that > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > > + > > > struct ddi_vbt_port_info { > > > /* Non-NULL if port present. */ > > > const struct child_device_config *child; @@ -1232,7 +1235,8 @@ > > > struct drm_i915_private { > > > } dram_info; > > > > > > struct intel_bw_info { > > > - unsigned int deratedbw[3]; /* for each QGV point */ > > > + /* for each QGV point */ > > > + unsigned int deratedbw[I915_NUM_SAGV_POINTS]; > > > u8 num_qgv_points; > > > u8 num_planes; > > > } max_bw[6]; > > > -- > > > 2.17.1 > > > >
On Mon, 2019-11-25 at 16:03 +0000, Saarinen, Jani wrote: > Hi, > > > -----Original Message----- > > From: Lisovskiy, Stanislav <stanislav.lisovskiy@intel.com> > > Sent: maanantai 25. marraskuuta 2019 17.55 > > To: ville.syrjala@linux.intel.com > > Cc: Saarinen, Jani <jani.saarinen@intel.com>; > > intel-gfx@lists.freedesktop.org; > > Roper, Matthew D <matthew.d.roper@intel.com>; > > jani.nikula@linux.intel.com; > > Sarvela, Tomi P <tomi.p.sarvela@intel.com> > > Subject: Re: [PATCH v2] drm/i915: Support more QGV points > > > > On Mon, 2019-11-25 at 17:31 +0200, Ville Syrjälä wrote: > > > On Fri, Nov 22, 2019 at 04:10:49PM +0200, Stanislav Lisovskiy > > > wrote: > > > > According to BSpec 53998, there is a mask of max 8 SAGV/QGV > > > > points > > > > we need to support. > > > > > > > > Bumping this up to keep the CI happy(currently preventing tests > > > > to > > > > run), until all SAGV changes land. > > > > > > > > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189 > > > > Signed-off-by: Stanislav Lisovskiy < > > > > stanislav.lisovskiy@intel.com> > > > > --- > > > > drivers/gpu/drm/i915/display/intel_bw.c | 22 > > > > +++++++++++++++++-- > > > > --- > > > > drivers/gpu/drm/i915/i915_drv.h | 6 +++++- > > > > 2 files changed, 22 insertions(+), 6 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c > > > > b/drivers/gpu/drm/i915/display/intel_bw.c > > > > index 86e75e858008..d1b805b30177 100644 > > > > --- a/drivers/gpu/drm/i915/display/intel_bw.c > > > > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > > > > @@ -15,7 +15,7 @@ struct intel_qgv_point { }; > > > > > > > > struct intel_qgv_info { > > > > - struct intel_qgv_point points[3]; > > > > + struct intel_qgv_point points[I915_NUM_SAGV_POINTS]; > > > > u8 num_points; > > > > u8 num_channels; > > > > u8 t_bl; > > > > @@ -276,15 +276,27 @@ void intel_bw_init_hw(struct > > > > drm_i915_private > > > > *dev_priv) > > > > static unsigned int intel_max_data_rate(struct > > > > drm_i915_private > > > > *dev_priv, > > > > int > > > > num_planes) > > > > { > > > > - if (INTEL_GEN(dev_priv) >= 11) > > > > + if (INTEL_GEN(dev_priv) >= 11) { > > > > + /* > > > > + * Any bw group has same amount of QGV points > > > > + */ > > > > + const struct intel_bw_info *bi = > > > > + &dev_priv->max_bw[0]; > > > > + unsigned int min_bw = UINT_MAX; > > > > + int i; > > > > + > > > > /* > > > > * FIXME with SAGV disabled maybe we can assume > > > > * point 1 will always be used? Seems to match > > > > * the behaviour observed in the wild. > > > > */ > > > > - return min3(icl_max_bw(dev_priv, num_planes, > > > > 0), > > > > - icl_max_bw(dev_priv, num_planes, > > > > 1), > > > > - icl_max_bw(dev_priv, num_planes, > > > > 2)); > > > > + for (i = 0; i < bi->num_qgv_points; i++) { > > > > + unsigned int bw = icl_max_bw(dev_priv, > > > > num_planes, i); > > > > + > > > > + min_bw = min(bw, min_bw); > > > > + } > > > > + return min_bw; > > > > + } > > > > else > > > > return UINT_MAX; > > > > } > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > > > b/drivers/gpu/drm/i915/i915_drv.h index > > > > fdae5a919bc8..d45a9ffaed4f > > > > 100644 > > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > > @@ -621,6 +621,9 @@ struct i915_gem_mm { > > > > > > > > #define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no > > > > recovery? */ > > > > > > > > +/* BSpec precisely defines this */ > > > > +#define I915_NUM_SAGV_POINTS 8 > > > > > > I think everything else talks about "QGV points" rather than > > > "SAGV > > > points" now? Would be nice to be consistent. > > > > Agree, _SAGV_ is not that accurate here. > > Will change the naming. > > Can we do that while merging? I have already changed the name, will now send a v3, as this is a trivial fix, I guess we can then push it. > > > > > Stan > > > > > > > > Apart from that > > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > > > > + > > > > struct ddi_vbt_port_info { > > > > /* Non-NULL if port present. */ > > > > const struct child_device_config *child; @@ -1232,7 > > > > +1235,8 @@ > > > > struct drm_i915_private { > > > > } dram_info; > > > > > > > > struct intel_bw_info { > > > > - unsigned int deratedbw[3]; /* for each QGV > > > > point */ > > > > + /* for each QGV point */ > > > > + unsigned int deratedbw[I915_NUM_SAGV_POINTS]; > > > > u8 num_qgv_points; > > > > u8 num_planes; > > > > } max_bw[6]; > > > > -- > > > > 2.17.1 > > > > > >
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 86e75e858008..d1b805b30177 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -15,7 +15,7 @@ struct intel_qgv_point { }; struct intel_qgv_info { - struct intel_qgv_point points[3]; + struct intel_qgv_point points[I915_NUM_SAGV_POINTS]; u8 num_points; u8 num_channels; u8 t_bl; @@ -276,15 +276,27 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv) static unsigned int intel_max_data_rate(struct drm_i915_private *dev_priv, int num_planes) { - if (INTEL_GEN(dev_priv) >= 11) + if (INTEL_GEN(dev_priv) >= 11) { + /* + * Any bw group has same amount of QGV points + */ + const struct intel_bw_info *bi = + &dev_priv->max_bw[0]; + unsigned int min_bw = UINT_MAX; + int i; + /* * FIXME with SAGV disabled maybe we can assume * point 1 will always be used? Seems to match * the behaviour observed in the wild. */ - return min3(icl_max_bw(dev_priv, num_planes, 0), - icl_max_bw(dev_priv, num_planes, 1), - icl_max_bw(dev_priv, num_planes, 2)); + for (i = 0; i < bi->num_qgv_points; i++) { + unsigned int bw = icl_max_bw(dev_priv, num_planes, i); + + min_bw = min(bw, min_bw); + } + return min_bw; + } else return UINT_MAX; } diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index fdae5a919bc8..d45a9ffaed4f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -621,6 +621,9 @@ struct i915_gem_mm { #define I915_ENGINE_WEDGED_TIMEOUT (60 * HZ) /* Reset but no recovery? */ +/* BSpec precisely defines this */ +#define I915_NUM_SAGV_POINTS 8 + struct ddi_vbt_port_info { /* Non-NULL if port present. */ const struct child_device_config *child; @@ -1232,7 +1235,8 @@ struct drm_i915_private { } dram_info; struct intel_bw_info { - unsigned int deratedbw[3]; /* for each QGV point */ + /* for each QGV point */ + unsigned int deratedbw[I915_NUM_SAGV_POINTS]; u8 num_qgv_points; u8 num_planes; } max_bw[6];
According to BSpec 53998, there is a mask of max 8 SAGV/QGV points we need to support. Bumping this up to keep the CI happy(currently preventing tests to run), until all SAGV changes land. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=112189 Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_bw.c | 22 +++++++++++++++++----- drivers/gpu/drm/i915/i915_drv.h | 6 +++++- 2 files changed, 22 insertions(+), 6 deletions(-)