diff mbox series

[3/6] drm/i915/fbc: Move the plane state check into the fbc functions

Message ID 20191213133453.22152-3-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/6] drm/i915/fbc: Reject PLANE_OFFSET.y%4!=0 on icl+ too | expand

Commit Message

Ville Syrjala Dec. 13, 2019, 1:34 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Instead of dealing with the presence/absence of the primary
plane in the higher level pre/post plane update code let's
move all that into the fbc code itself. Now the higher level
code doesn't have to think about FBC details anymore.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 26 +++----------
 drivers/gpu/drm/i915/display/intel_fbc.c     | 40 +++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_fbc.h     | 13 +++----
 3 files changed, 42 insertions(+), 37 deletions(-)

Comments

Imre Deak Jan. 15, 2020, 3:05 p.m. UTC | #1 
On Fri, Dec 13, 2019 at 03:34:50PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Instead of dealing with the presence/absence of the primary
> plane in the higher level pre/post plane update code let's
> move all that into the fbc code itself. Now the higher level
> code doesn't have to think about FBC details anymore.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 26 +++----------
>  drivers/gpu/drm/i915/display/intel_fbc.c     | 40 +++++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_fbc.h     | 13 +++----
>  3 files changed, 42 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 8f14352a2193..3e540fcca216 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6013,13 +6013,10 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
>  				    struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
>  	const struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
>  	const struct intel_crtc_state *new_crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
> -	const struct intel_plane_state *new_primary_state =
> -		intel_atomic_get_new_plane_state(state, primary);
>  	enum pipe pipe = crtc->pipe;
>  
>  	intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
> @@ -6030,8 +6027,7 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
>  	if (hsw_post_update_enable_ips(old_crtc_state, new_crtc_state))
>  		hsw_enable_ips(new_crtc_state);
>  
> -	if (new_primary_state)
> -		intel_fbc_post_update(crtc);
> +	intel_fbc_post_update(state, crtc);
>  
>  	if (needs_nv12_wa(old_crtc_state) &&
>  	    !needs_nv12_wa(new_crtc_state))
> @@ -6046,20 +6042,16 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
>  				   struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
>  	const struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
>  	const struct intel_crtc_state *new_crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
> -	const struct intel_plane_state *new_primary_state =
> -		intel_atomic_get_new_plane_state(state, primary);
>  	enum pipe pipe = crtc->pipe;
>  
>  	if (hsw_pre_update_disable_ips(old_crtc_state, new_crtc_state))
>  		hsw_disable_ips(old_crtc_state);
>  
> -	if (new_primary_state &&
> -	    intel_fbc_pre_update(crtc, new_crtc_state, new_primary_state))
> +	if (intel_fbc_pre_update(state, crtc))
>  		intel_wait_for_vblank(dev_priv, pipe);
>  
>  	/* Display WA 827 */
> @@ -14289,9 +14281,6 @@ static void intel_update_crtc(struct intel_crtc *crtc,
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>  	bool modeset = needs_modeset(new_crtc_state);
> -	struct intel_plane_state *new_plane_state =
> -		intel_atomic_get_new_plane_state(state,
> -						 to_intel_plane(crtc->base.primary));
>  
>  	if (modeset) {
>  		intel_crtc_update_active_timings(new_crtc_state);
> @@ -14314,8 +14303,8 @@ static void intel_update_crtc(struct intel_crtc *crtc,
>  
>  	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
>  		intel_fbc_disable(crtc);
> -	else if (new_plane_state)
> -		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
> +	else
> +		intel_fbc_enable(state, crtc);
>  
>  	/* Perform vblank evasion around commit operation */
>  	intel_pipe_update_start(new_crtc_state);
> @@ -14472,15 +14461,12 @@ static void intel_post_crtc_enable_updates(struct intel_crtc *crtc,
>  		intel_atomic_get_new_crtc_state(state, crtc);
>  	struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
> -	struct intel_plane_state *new_plane_state =
> -		intel_atomic_get_new_plane_state(state,
> -						 to_intel_plane(crtc->base.primary));
>  	bool modeset = needs_modeset(new_crtc_state);
>  
>  	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
>  		intel_fbc_disable(crtc);
> -	else if (new_plane_state)
> -		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
> +	else
> +		intel_fbc_enable(state, crtc);
>  
>  	/* Perform vblank evasion around commit operation */
>  	intel_pipe_update_start(new_crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a1048ece541e..42504e6353d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -867,10 +867,14 @@ static bool intel_fbc_can_flip_nuke(const struct intel_crtc_state *crtc_state)
>  	return true;
>  }
>  
> -bool intel_fbc_pre_update(struct intel_crtc *crtc,
> -			  const struct intel_crtc_state *crtc_state,
> -			  const struct intel_plane_state *plane_state)
> +bool intel_fbc_pre_update(struct intel_atomic_state *state,
> +			  struct intel_crtc *crtc)
>  {
> +	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct intel_plane_state *plane_state =
> +		intel_atomic_get_new_plane_state(state, plane);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  	const char *reason = "update pending";
> @@ -879,6 +883,9 @@ bool intel_fbc_pre_update(struct intel_crtc *crtc,
>  	if (!fbc_supported(dev_priv))
>  		return need_vblank_wait;
>  
> +	if (!plane_state)
> +		return need_vblank_wait;
> +
>  	mutex_lock(&fbc->lock);
>  
>  	if (fbc->crtc != crtc)
> @@ -967,14 +974,21 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc)
>  		intel_fbc_deactivate(dev_priv, "frontbuffer write");
>  }
>  
> -void intel_fbc_post_update(struct intel_crtc *crtc)
> +void intel_fbc_post_update(struct intel_atomic_state *state,
> +			   struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> +	const struct intel_plane_state *plane_state =
> +		intel_atomic_get_new_plane_state(state, plane);
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  
>  	if (!fbc_supported(dev_priv))
>  		return;
>  
> +	if (!plane_state)
> +		return;
> +
>  	mutex_lock(&fbc->lock);
>  	__intel_fbc_post_update(crtc);
>  	mutex_unlock(&fbc->lock);
> @@ -1107,18 +1121,24 @@ void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
>   * intel_fbc_enable multiple times for the same pipe without an
>   * intel_fbc_disable in the middle, as long as it is deactivated.
>   */
> -void intel_fbc_enable(struct intel_crtc *crtc,
> -		      const struct intel_crtc_state *crtc_state,
> -		      const struct intel_plane_state *plane_state)
> +void intel_fbc_enable(struct intel_atomic_state *state,
> +		      struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct intel_plane_state *plane_state =
> +		intel_atomic_get_new_plane_state(state, plane);
>  	struct intel_fbc *fbc = &dev_priv->fbc;
>  	struct intel_fbc_state_cache *cache = &fbc->state_cache;
> -	const struct drm_framebuffer *fb = plane_state->hw.fb;
>  
>  	if (!fbc_supported(dev_priv))
>  		return;
>  
> +	if (!plane_state)
> +		return;
> +
>  	mutex_lock(&fbc->lock);
>  
>  	if (fbc->crtc) {
> @@ -1139,14 +1159,14 @@ void intel_fbc_enable(struct intel_crtc *crtc,
>  
>  	if (intel_fbc_alloc_cfb(dev_priv,
>  				intel_fbc_calculate_cfb_size(dev_priv, cache),
> -				fb->format->cpp[0])) {
> +				plane_state->hw.fb->format->cpp[0])) {
>  		cache->plane.visible = false;
>  		fbc->no_fbc_reason = "not enough stolen memory";
>  		goto out;
>  	}
>  
>  	if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
> -	    fb->modifier != I915_FORMAT_MOD_X_TILED)
> +	    plane_state->hw.fb->modifier != I915_FORMAT_MOD_X_TILED)
>  		cache->gen9_wa_cfb_stride =
>  			DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
>  	else
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
> index c8a5e5098687..6dc1edefe81b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -19,14 +19,13 @@ struct intel_plane_state;
>  void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
>  			   struct intel_atomic_state *state);
>  bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
> -bool intel_fbc_pre_update(struct intel_crtc *crtc,
> -			  const struct intel_crtc_state *crtc_state,
> -			  const struct intel_plane_state *plane_state);
> -void intel_fbc_post_update(struct intel_crtc *crtc);
> +bool intel_fbc_pre_update(struct intel_atomic_state *state,
> +			  struct intel_crtc *crtc);
> +void intel_fbc_post_update(struct intel_atomic_state *state,
> +			   struct intel_crtc *crtc);
>  void intel_fbc_init(struct drm_i915_private *dev_priv);
> -void intel_fbc_enable(struct intel_crtc *crtc,
> -		      const struct intel_crtc_state *crtc_state,
> -		      const struct intel_plane_state *plane_state);
> +void intel_fbc_enable(struct intel_atomic_state *state,
> +		      struct intel_crtc *crtc);
>  void intel_fbc_disable(struct intel_crtc *crtc);
>  void intel_fbc_global_disable(struct drm_i915_private *dev_priv);
>  void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
> -- 
> 2.23.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8f14352a2193..3e540fcca216 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6013,13 +6013,10 @@  static void intel_post_plane_update(struct intel_atomic_state *state,
 				    struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
 	const struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
 	const struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
-	const struct intel_plane_state *new_primary_state =
-		intel_atomic_get_new_plane_state(state, primary);
 	enum pipe pipe = crtc->pipe;
 
 	intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
@@ -6030,8 +6027,7 @@  static void intel_post_plane_update(struct intel_atomic_state *state,
 	if (hsw_post_update_enable_ips(old_crtc_state, new_crtc_state))
 		hsw_enable_ips(new_crtc_state);
 
-	if (new_primary_state)
-		intel_fbc_post_update(crtc);
+	intel_fbc_post_update(state, crtc);
 
 	if (needs_nv12_wa(old_crtc_state) &&
 	    !needs_nv12_wa(new_crtc_state))
@@ -6046,20 +6042,16 @@  static void intel_pre_plane_update(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-	struct intel_plane *primary = to_intel_plane(crtc->base.primary);
 	const struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
 	const struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
-	const struct intel_plane_state *new_primary_state =
-		intel_atomic_get_new_plane_state(state, primary);
 	enum pipe pipe = crtc->pipe;
 
 	if (hsw_pre_update_disable_ips(old_crtc_state, new_crtc_state))
 		hsw_disable_ips(old_crtc_state);
 
-	if (new_primary_state &&
-	    intel_fbc_pre_update(crtc, new_crtc_state, new_primary_state))
+	if (intel_fbc_pre_update(state, crtc))
 		intel_wait_for_vblank(dev_priv, pipe);
 
 	/* Display WA 827 */
@@ -14289,9 +14281,6 @@  static void intel_update_crtc(struct intel_crtc *crtc,
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 	bool modeset = needs_modeset(new_crtc_state);
-	struct intel_plane_state *new_plane_state =
-		intel_atomic_get_new_plane_state(state,
-						 to_intel_plane(crtc->base.primary));
 
 	if (modeset) {
 		intel_crtc_update_active_timings(new_crtc_state);
@@ -14314,8 +14303,8 @@  static void intel_update_crtc(struct intel_crtc *crtc,
 
 	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
 		intel_fbc_disable(crtc);
-	else if (new_plane_state)
-		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
+	else
+		intel_fbc_enable(state, crtc);
 
 	/* Perform vblank evasion around commit operation */
 	intel_pipe_update_start(new_crtc_state);
@@ -14472,15 +14461,12 @@  static void intel_post_crtc_enable_updates(struct intel_crtc *crtc,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
-	struct intel_plane_state *new_plane_state =
-		intel_atomic_get_new_plane_state(state,
-						 to_intel_plane(crtc->base.primary));
 	bool modeset = needs_modeset(new_crtc_state);
 
 	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
 		intel_fbc_disable(crtc);
-	else if (new_plane_state)
-		intel_fbc_enable(crtc, new_crtc_state, new_plane_state);
+	else
+		intel_fbc_enable(state, crtc);
 
 	/* Perform vblank evasion around commit operation */
 	intel_pipe_update_start(new_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index a1048ece541e..42504e6353d5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -867,10 +867,14 @@  static bool intel_fbc_can_flip_nuke(const struct intel_crtc_state *crtc_state)
 	return true;
 }
 
-bool intel_fbc_pre_update(struct intel_crtc *crtc,
-			  const struct intel_crtc_state *crtc_state,
-			  const struct intel_plane_state *plane_state)
+bool intel_fbc_pre_update(struct intel_atomic_state *state,
+			  struct intel_crtc *crtc)
 {
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_plane_state *plane_state =
+		intel_atomic_get_new_plane_state(state, plane);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 	const char *reason = "update pending";
@@ -879,6 +883,9 @@  bool intel_fbc_pre_update(struct intel_crtc *crtc,
 	if (!fbc_supported(dev_priv))
 		return need_vblank_wait;
 
+	if (!plane_state)
+		return need_vblank_wait;
+
 	mutex_lock(&fbc->lock);
 
 	if (fbc->crtc != crtc)
@@ -967,14 +974,21 @@  static void __intel_fbc_post_update(struct intel_crtc *crtc)
 		intel_fbc_deactivate(dev_priv, "frontbuffer write");
 }
 
-void intel_fbc_post_update(struct intel_crtc *crtc)
+void intel_fbc_post_update(struct intel_atomic_state *state,
+			   struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+	const struct intel_plane_state *plane_state =
+		intel_atomic_get_new_plane_state(state, plane);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 
 	if (!fbc_supported(dev_priv))
 		return;
 
+	if (!plane_state)
+		return;
+
 	mutex_lock(&fbc->lock);
 	__intel_fbc_post_update(crtc);
 	mutex_unlock(&fbc->lock);
@@ -1107,18 +1121,24 @@  void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
  * intel_fbc_enable multiple times for the same pipe without an
  * intel_fbc_disable in the middle, as long as it is deactivated.
  */
-void intel_fbc_enable(struct intel_crtc *crtc,
-		      const struct intel_crtc_state *crtc_state,
-		      const struct intel_plane_state *plane_state)
+void intel_fbc_enable(struct intel_atomic_state *state,
+		      struct intel_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	struct intel_plane *plane = to_intel_plane(crtc->base.primary);
+	const struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_plane_state *plane_state =
+		intel_atomic_get_new_plane_state(state, plane);
 	struct intel_fbc *fbc = &dev_priv->fbc;
 	struct intel_fbc_state_cache *cache = &fbc->state_cache;
-	const struct drm_framebuffer *fb = plane_state->hw.fb;
 
 	if (!fbc_supported(dev_priv))
 		return;
 
+	if (!plane_state)
+		return;
+
 	mutex_lock(&fbc->lock);
 
 	if (fbc->crtc) {
@@ -1139,14 +1159,14 @@  void intel_fbc_enable(struct intel_crtc *crtc,
 
 	if (intel_fbc_alloc_cfb(dev_priv,
 				intel_fbc_calculate_cfb_size(dev_priv, cache),
-				fb->format->cpp[0])) {
+				plane_state->hw.fb->format->cpp[0])) {
 		cache->plane.visible = false;
 		fbc->no_fbc_reason = "not enough stolen memory";
 		goto out;
 	}
 
 	if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
-	    fb->modifier != I915_FORMAT_MOD_X_TILED)
+	    plane_state->hw.fb->modifier != I915_FORMAT_MOD_X_TILED)
 		cache->gen9_wa_cfb_stride =
 			DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
 	else
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index c8a5e5098687..6dc1edefe81b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -19,14 +19,13 @@  struct intel_plane_state;
 void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
 			   struct intel_atomic_state *state);
 bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
-bool intel_fbc_pre_update(struct intel_crtc *crtc,
-			  const struct intel_crtc_state *crtc_state,
-			  const struct intel_plane_state *plane_state);
-void intel_fbc_post_update(struct intel_crtc *crtc);
+bool intel_fbc_pre_update(struct intel_atomic_state *state,
+			  struct intel_crtc *crtc);
+void intel_fbc_post_update(struct intel_atomic_state *state,
+			   struct intel_crtc *crtc);
 void intel_fbc_init(struct drm_i915_private *dev_priv);
-void intel_fbc_enable(struct intel_crtc *crtc,
-		      const struct intel_crtc_state *crtc_state,
-		      const struct intel_plane_state *plane_state);
+void intel_fbc_enable(struct intel_atomic_state *state,
+		      struct intel_crtc *crtc);
 void intel_fbc_disable(struct intel_crtc *crtc);
 void intel_fbc_global_disable(struct drm_i915_private *dev_priv);
 void intel_fbc_invalidate(struct drm_i915_private *dev_priv,