[v2] drm/i915: Add Wa_1407352427:icl,ehl

Commit Message

Matt Roper Dec. 26, 2019, 6:40 p.m. UTC

The workaround database now indicates we need to disable psdunit clock
gating as well.

Bspec: 32354
Bspec: 33450
Bspec: 33451
Suggested-by: Lionel Landwerlin <[e-mail]>
Cc: [e-mail]
Cc: Lionel Landwerlin <[e-mail]>
Cc: Lucas De Marchi <[e-mail]>
Cc: Matt Atwood <[e-mail]>
Signed-off-by: Matt Roper <[e-mail]>
Acked-by: Lionel Landwerlin <[e-mail]>
---
 drivers/gpu/drm/i915/i915_reg.h | 3 +++
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 7 insertions(+)

Comments

Sasha Levin Dec. 30, 2019, 12:56 a.m. UTC | #1

Hi,

[This is an automated email]

This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.4.6, v5.3.18, v4.19.91, v4.14.160, v4.9.207, v4.4.207.

v5.4.6: Build OK!
v5.3.18: Build OK!
v4.19.91: Failed to apply! Possible dependencies:
    622b3f68139e ("drm/i915/icl: Add WaEnable32PlaneMode")

v4.14.160: Failed to apply! Possible dependencies:
    01ab0f921607 ("drm/i915: Implement WaDisableVFclkgate.")
    0a46ddd57c9e ("drm/i915/cnp: Wa 1181: Fix Backlight issue")
    0a60797a0efb ("drm/i915: Implement ReadHitWriteOnlyDisable.")
    2cbecff4122c ("drm/i915/cnl: WaPushConstantDereferenceHoldDisable")
    34991bd48c92 ("drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl")
    392572feb01c ("drm/i915/cnl: WA FtrEnableFastAnisoL1BankingFix")
    5152defe4a53 ("drm/i915/preempt: Default to disabled mid-command preemption levels")
    8f067837c4b7 ("drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk")
    90007bca6162 ("drm/i915/cnl: Introduce initial Cannonlake Workarounds.")
    91200c09d38b ("drm/i915: Stop using long platform names on clock gating functions.")

v4.9.207: Failed to apply! Possible dependencies:
    01ab0f921607 ("drm/i915: Implement WaDisableVFclkgate.")
    03cdc1d4f795 ("drm/i915: Store port enum in intel_encoder")
    46c26662d2fb ("drm/i915/cfl: Introduce Coffee Lake workarounds.")
    4f8036a28112 ("drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv")
    50a0bc905416 ("drm/i915: Make INTEL_DEVID only take dev_priv")
    6e266956a57f ("drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv")
    8652744b647e ("drm/i915: Make IS_BROADWELL only take dev_priv")
    8da53efaa228 ("drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.")
    90007bca6162 ("drm/i915/cnl: Introduce initial Cannonlake Workarounds.")
    9fb5026f857d ("drm/i915/glk: Turn on workarounds that apply to Geminilake too")

v4.4.207: Failed to apply! Possible dependencies:
    01ab0f921607 ("drm/i915: Implement WaDisableVFclkgate.")
    0673ad472b98 ("drm/i915: Merge i915_dma.c into i915_drv.c")
    0a9d2bed5557 ("drm/i915/skl: Making DC6 entry is the last call in suspend flow.")
    0ad35fed618c ("drm/i915: gvt: Introduce the basic architecture of GVT-g")
    1f814daca43a ("drm/i915: add support for checking if we hold an RPM reference")
    2f693e28b8df ("drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences")
    399bb5b6db02 ("drm/i915: Move allocation of various workqueues earlier during init")
    414b7999b8be ("drm/i915/gen9: Remove csr.state, csr_lock and related code.")
    46c26662d2fb ("drm/i915/cfl: Introduce Coffee Lake workarounds.")
    5d7a6eefc3b0 ("drm/i915: Split out load time early initialization")
    643a24b6ecdc ("drm/i915: Kconfig for extra driver debugging")
    73dfc227ff5c ("drm/i915/skl: init/uninit display core as part of the HW power domain state")
    755412e29c77 ("drm/i915: Add an optional selection from i915 of CONFIG_MMU_NOTIFIER")
    8652744b647e ("drm/i915: Make IS_BROADWELL only take dev_priv")
    8da53efaa228 ("drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.")
    90007bca6162 ("drm/i915/cnl: Introduce initial Cannonlake Workarounds.")
    9c5308ea1cd4 ("drm/i915/skl: Refuse to load outdated dmc firmware")
    9fb5026f857d ("drm/i915/glk: Turn on workarounds that apply to Geminilake too")
    b6e7d894c3d2 ("drm/i915/skl: Store and print the DMC firmware version we load")
    bc87229f323e ("drm/i915/skl: enable PC9/10 power states during suspend-to-idle")
    c73666f394fc ("drm/i915/skl: If needed sanitize bios programmed cdclk")
    d5165ebd527c ("drm/i915: implement WaIncreaseDefaultTLBEntries")
    ebae38d061df ("drm/i915/gen9: csr_init after runtime pm enable")
    f4448375467d ("drm/i915/gen9: Use dev_priv in csr functions")
    f514c2d84285 ("drm/i915/gen9: flush DMC fw loading work during system suspend")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bbfedeb00b7f..b98734378c9a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4179,6 +4179,9 @@  enum {
 #define UNSLICE_UNIT_LEVEL_CLKGATE	_MMIO(0x9434)
 #define  VFUNIT_CLKGATE_DIS		(1 << 20)
 
+#define UNSLICE_UNIT_LEVEL_CLKGATE2	_MMIO(0x94e4)
+#define   PSDUNIT_CLKGATE_DIS		REG_BIT(5)
+
 #define INF_UNIT_LEVEL_CLKGATE		_MMIO(0x9560)
 #define   CGPSF_CLKGATE_DIS		(1 << 3)
 
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 31ec82337e4f..8bc8f0836368 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6590,6 +6590,10 @@  static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
 	/* WaEnable32PlaneMode:icl */
 	I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
 		   _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
+
+	/* Wa_1407352427:icl,ehl */
+	intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
+			 0, PSDUNIT_CLKGATE_DIS);
 }
 
 static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)