[v2] drm/i915: Add missing HDMI audio pixel clocks for gen12

Commit Message

Kai Vehmanen Jan. 29, 2020, 8:19 a.m. UTC

Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
and 593.4/594Mhz. Add the missing rates and add logic to ignore
them if running on older hardware.

Bspec: 49333
Signed-off-by: Kai Vehmanen <[e-mail]>
---
 drivers/gpu/drm/i915/display/intel_audio.c | 14 +++++++++++---
 drivers/gpu/drm/i915/i915_reg.h            |  4 ++++
 2 files changed, 15 insertions(+), 3 deletions(-)

Comments

Kai Vehmanen Feb. 10, 2020, 11:51 a.m. UTC | #1

Hey,

some delay but coming back to this CI failure:

On Fri, 31 Jan 2020, Patchwork wrote:

> == Series Details ==
> 
> Series: drm/i915: Add missing HDMI audio pixel clocks for gen12 (rev2)
> URL   : https://patchwork.freedesktop.org/series/72617/
> State : failure

I've been going through the logs and in the failing case 
(igt@gem_exec_schedule@pi-shared-iova-bl times out), there are not
HDMI-enabled monitors connected to the device under test, so the modified 
code in my patch is not even run. So would appear to be unrelated.

Any further actions needed?

Br, Kai

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 3926b9b9a09f..e00608c898e1 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -148,6 +148,10 @@  static const struct {
 	{ 74250, AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 },
 	{ 148352, AUD_CONFIG_PIXEL_CLOCK_HDMI_148352 },
 	{ 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 },
+	{ 296703, AUD_CONFIG_PIXEL_CLOCK_HDMI_296703 },
+	{ 297000, AUD_CONFIG_PIXEL_CLOCK_HDMI_297000 },
+	{ 593407, AUD_CONFIG_PIXEL_CLOCK_HDMI_593407 },
+	{ 594000, AUD_CONFIG_PIXEL_CLOCK_HDMI_594000 },
 };
 
 /* HDMI N/CTS table */
@@ -231,7 +235,8 @@  static const struct hdmi_aud_ncts hdmi_aud_ncts_36bpp[] = {
 };
 
 /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
-static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)
+static u32 audio_config_hdmi_pixel_clock(struct drm_i915_private *dev_priv,
+					 const struct intel_crtc_state *crtc_state)
 {
 	const struct drm_display_mode *adjusted_mode =
 		&crtc_state->hw.adjusted_mode;
@@ -242,6 +247,9 @@  static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_sta
 			break;
 	}
 
+	if (INTEL_GEN(dev_priv) < 12 && adjusted_mode->crtc_clock > 148500)
+		i = ARRAY_SIZE(hdmi_audio_clock);
+
 	if (i == ARRAY_SIZE(hdmi_audio_clock)) {
 		DRM_DEBUG_KMS("HDMI audio pixel clock setting for %d not found, falling back to defaults\n",
 			      adjusted_mode->crtc_clock);
@@ -436,7 +444,7 @@  hsw_hdmi_audio_config_update(struct intel_encoder *encoder,
 	tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
 	tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
 	tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
-	tmp |= audio_config_hdmi_pixel_clock(crtc_state);
+	tmp |= audio_config_hdmi_pixel_clock(dev_priv, crtc_state);
 
 	n = audio_config_hdmi_get_n(crtc_state, rate);
 	if (n != 0) {
@@ -681,7 +689,7 @@  static void ilk_audio_codec_enable(struct intel_encoder *encoder,
 	if (intel_crtc_has_dp_encoder(crtc_state))
 		tmp |= AUD_CONFIG_N_VALUE_INDEX;
 	else
-		tmp |= audio_config_hdmi_pixel_clock(crtc_state);
+		tmp |= audio_config_hdmi_pixel_clock(dev_priv, crtc_state);
 	intel_de_write(dev_priv, aud_config, tmp);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b93c4c18f05c..359c09bcb751 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9247,6 +9247,10 @@  enum {
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_74250	(7 << 16)
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148352	(8 << 16)
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148500	(9 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_296703	(10 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_297000	(11 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_593407	(12 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_594000	(13 << 16)
 #define   AUD_CONFIG_DISABLE_NCTS		(1 << 3)
 
 /* HSW Audio */