diff mbox series

[4/9] drm/i915/dsb: Stop with the RMW

Message ID 20200129182034.26138-4-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/9] drm/i915/dsb: Replace HAS_DSB check with dsb->cmd_buf check | expand

Commit Message

Ville Syrjala Jan. 29, 2020, 6:20 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We don't want to keep random bits set in DSB_CTRL. Stop the
harmful RMW.

Also flip the reverse & around to appease my ocd.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 20 +++++++-------------
 1 file changed, 7 insertions(+), 13 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 5bb4ac1610a5..8b357b35c41f 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -40,7 +40,7 @@  static inline bool is_dsb_busy(struct intel_dsb *dsb)
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 
-	return DSB_STATUS & intel_de_read(dev_priv, DSB_CTRL(pipe, dsb->id));
+	return intel_de_read(dev_priv, DSB_CTRL(pipe, dsb->id)) & DSB_STATUS;
 }
 
 static inline bool intel_dsb_enable_engine(struct intel_dsb *dsb)
@@ -48,18 +48,15 @@  static inline bool intel_dsb_enable_engine(struct intel_dsb *dsb)
 	struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
-	u32 dsb_ctrl;
 
-	dsb_ctrl = intel_de_read(dev_priv, DSB_CTRL(pipe, dsb->id));
-	if (DSB_STATUS & dsb_ctrl) {
+	if (is_dsb_busy(dsb)) {
 		DRM_ERROR("DSB engine is busy.\n");
 		return false;
 	}
 
-	dsb_ctrl |= DSB_ENABLE;
-	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), dsb_ctrl);
-
+	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), DSB_ENABLE);
 	intel_de_posting_read(dev_priv, DSB_CTRL(pipe, dsb->id));
+
 	return true;
 }
 
@@ -68,18 +65,15 @@  static inline bool intel_dsb_disable_engine(struct intel_dsb *dsb)
 	struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
-	u32 dsb_ctrl;
 
-	dsb_ctrl = intel_de_read(dev_priv, DSB_CTRL(pipe, dsb->id));
-	if (DSB_STATUS & dsb_ctrl) {
+	if (is_dsb_busy(dsb)) {
 		DRM_DEBUG_KMS("DSB engine is busy.\n");
 		return false;
 	}
 
-	dsb_ctrl &= ~DSB_ENABLE;
-	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), dsb_ctrl);
-
+	intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), 0);
 	intel_de_posting_read(dev_priv, DSB_CTRL(pipe, dsb->id));
+
 	return true;
 }