| Message ID | 20200130113108.10441-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [RFC,1/2] drm/i915/tgl: WaEnablePreemptionGranularityControlByUMD | expand |
Quoting Tvrtko Ursulin (2020-01-30 11:31:07) > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Enable FtrPerCtxtPreemptionGranularityControl bit and whitelist > GEN8_CS_CHICKEN1 so WaEnablePreemptionGranularityControlByUMD is > implemented. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Michał Winiarski <michal.winiarski@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: piotr.zdunowski@intel.com > Cc: michal.mrozek@intel.com Seems no worse, and yet no better. Acked-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
On Thu, Jan 30, 2020 at 11:31:07AM +0000, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Enable FtrPerCtxtPreemptionGranularityControl bit and whitelist > GEN8_CS_CHICKEN1 so WaEnablePreemptionGranularityControlByUMD is > implemented. I may be misremembering, but wasn't this a "fake" workaround we added on past platforms to avoid breaking compatibility with old pre-preemption userspace? I.e., some userspace wasn't expecting fine-grained preemption, so turning it on by default in the kernel would cause breakage; we had to set the default to 'disabled' and then make preemption-aware userspace opt back in. Do we still need that for TGL? Wouldn't all userspace that exists for this platform be aware of fine-grained preemption now (meaning we wouldn't need to work around old, dumb userspace on this platform and could just enable fine-grained preemption by default in the kernel)? Or do we need this because there are there other workarounds that require userspace to explicitly disable fine-grained preemption around specific operations? Matt > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Michał Winiarski <michal.winiarski@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: piotr.zdunowski@intel.com > Cc: michal.mrozek@intel.com > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 5a7db279f702..5d2a8cb70e16 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -1254,6 +1254,9 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine) > whitelist_reg_ext(w, PS_INVOCATION_COUNT, > RING_FORCE_TO_NONPRIV_ACCESS_RD | > RING_FORCE_TO_NONPRIV_RANGE_4); > + > + /* WaEnablePreemptionGranularityControlByUMD:tgl */ > + whitelist_reg(w, GEN8_CS_CHICKEN1); > break; > default: > break; > @@ -1412,8 +1415,8 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) > 0); > } > > - if (IS_GEN_RANGE(i915, 9, 11)) { > - /* FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl */ > + if (IS_GEN_RANGE(i915, 9, 12)) { > + /* FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl,tgl */ > wa_masked_en(wal, > GEN7_FF_SLICE_CS_CHICKEN1, > GEN9_FFSC_PERCTX_PREEMPT_CTRL); > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 5a7db279f702..5d2a8cb70e16 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1254,6 +1254,9 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine) whitelist_reg_ext(w, PS_INVOCATION_COUNT, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4); + + /* WaEnablePreemptionGranularityControlByUMD:tgl */ + whitelist_reg(w, GEN8_CS_CHICKEN1); break; default: break; @@ -1412,8 +1415,8 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) 0); } - if (IS_GEN_RANGE(i915, 9, 11)) { - /* FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl */ + if (IS_GEN_RANGE(i915, 9, 12)) { + /* FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl,tgl */ wa_masked_en(wal, GEN7_FF_SLICE_CS_CHICKEN1, GEN9_FFSC_PERCTX_PREEMPT_CTRL);