@@ -15695,7 +15695,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_encoders_update_prepare(state);
/* Enable all new slices, we might need */
- icl_dbuf_slice_pre_update(state);
+ if (state->modeset)
+ icl_dbuf_slice_pre_update(state);
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
dev_priv->display.commit_modeset_enables(state);
@@ -15751,7 +15752,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
}
/* Disable all slices, we don't need */
- icl_dbuf_slice_post_update(state);
+ if (state->modeset)
+ icl_dbuf_slice_post_update(state);
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
intel_post_plane_update(state, crtc);
During full modeset, global state(i.e dev_priv) is protected by locking the crtcs in state, otherwise global state is not serialized. Also if it is not a full modeset, we anyway don't need to change DBuf slice configuration as Pipe configuration doesn't change. Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)