| Message ID | 20200208220106.3311791-3-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] drm/i915/gt: Tweak gen7 xcs flushing | expand |
On Sat, Feb 08, 2020 at 10:01:06PM +0000, Chris Wilson wrote: > Full-ppgtt on gen7 is proving to be highly unstable and not robust. > > Fixes: 3cd6e8860ecd ("drm/i915/gen7: Re-enable full-ppgtt for ivb & hsw") > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > --- Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > drivers/gpu/drm/i915/i915_pci.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 24b1f0ce8743..1d678aa7d420 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -437,7 +437,7 @@ static const struct intel_device_info snb_m_gt2_info = { > .has_rc6 = 1, \ > .has_rc6p = 1, \ > .has_rps = true, \ > - .ppgtt_type = INTEL_PPGTT_FULL, \ > + .ppgtt_type = INTEL_PPGTT_ALIASING, \ > .ppgtt_size = 31, \ > IVB_PIPE_OFFSETS, \ > IVB_CURSOR_OFFSETS, \ > @@ -494,7 +494,7 @@ static const struct intel_device_info vlv_info = { > .has_rps = true, > .display.has_gmch = 1, > .display.has_hotplug = 1, > - .ppgtt_type = INTEL_PPGTT_FULL, > + .ppgtt_type = INTEL_PPGTT_ALIASING, > .ppgtt_size = 31, > .has_snoop = true, > .has_coherent_ggtt = false, > -- > 2.25.0 >
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 24b1f0ce8743..1d678aa7d420 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -437,7 +437,7 @@ static const struct intel_device_info snb_m_gt2_info = { .has_rc6 = 1, \ .has_rc6p = 1, \ .has_rps = true, \ - .ppgtt_type = INTEL_PPGTT_FULL, \ + .ppgtt_type = INTEL_PPGTT_ALIASING, \ .ppgtt_size = 31, \ IVB_PIPE_OFFSETS, \ IVB_CURSOR_OFFSETS, \ @@ -494,7 +494,7 @@ static const struct intel_device_info vlv_info = { .has_rps = true, .display.has_gmch = 1, .display.has_hotplug = 1, - .ppgtt_type = INTEL_PPGTT_FULL, + .ppgtt_type = INTEL_PPGTT_ALIASING, .ppgtt_size = 31, .has_snoop = true, .has_coherent_ggtt = false,
Full-ppgtt on gen7 is proving to be highly unstable and not robust. Fixes: 3cd6e8860ecd ("drm/i915/gen7: Re-enable full-ppgtt for ivb & hsw") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)