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[77.8.12.32]) by smtp.gmail.com with ESMTPSA id i7sm3162028wma.32.2020.02.28.08.19.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Feb 2020 08:19:18 -0800 (PST) From: Oliver Barta X-Google-Original-From: Oliver Barta To: intel-gfx@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen Date: Fri, 28 Feb 2020 17:18:21 +0100 Message-Id: <20200228161821.6667-3-oliver.barta@aptiv.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200228161821.6667-1-oliver.barta@aptiv.com> References: <20200226080645.7421-1-oliver.barta@aptiv.com> <20200228161821.6667-1-oliver.barta@aptiv.com> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 28 Feb 2020 17:04:38 +0000 Subject: [Intel-gfx] [PATCH v2 3/3] drm/i915: HDCP: retry link integrity check on failure X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Oliver Barta Cc: Daniel Vetter , Ravisankar Madasamy , Sean Paul , Oliver Barta Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Oliver Barta A single Ri mismatch doesn't automatically mean that the link integrity is broken. Update and check of Ri and Ri' are done asynchronously. In case an update happens just between the read of Ri' and the check against Ri there will be a mismatch even if the link integrity is fine otherwise. A failure can also be caused by transmission errors on DDC. Signed-off-by: Oliver Barta --- [v2] Rebased patch series from master to drm-intel-next-queued branch. drivers/gpu/drm/i915/display/intel_hdmi.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index ac4276157182..296b4e1bb3c6 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -1516,7 +1516,7 @@ int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port *intel_dig_port, } static -bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port) +bool intel_hdmi_hdcp_check_link_once(struct intel_digital_port *intel_dig_port) { struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev); struct intel_connector *connector = @@ -1539,13 +1539,26 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port) if (wait_for((intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) & (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC)) == (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) { - DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n", + DRM_DEBUG("Ri' mismatch detected (%x)\n", intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port))); return false; } return true; } +static +bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port) +{ + int retry; + + for (retry = 0; retry < 3; retry++) + if (intel_hdmi_hdcp_check_link_once(intel_dig_port)) + return true; + + DRM_ERROR("Link check failed\n"); + return false; +} + struct hdcp2_hdmi_msg_timeout { u8 msg_id; u16 timeout;