| Message ID | 20200413164515.13355-8-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4,1/9] drm/i915/display: Move out code to return the digital_port of the aux ch | expand |
On Mon, Apr 13, 2020 at 09:45:14AM -0700, José Roberto de Souza wrote: > This is a expected timeout of static TC ports not conneceted, so > not throwing warnings that would taint CI. > > v3: > - moved checks to tc_phy_aux_timeout_expected() > > v4: > - moved and add comments to tc_phy_aux_timeout_expected() > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > .../drm/i915/display/intel_display_power.c | 56 +++++++++++++------ > 1 file changed, 39 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index 00de926aaccf..2d2125d1534b 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -284,6 +284,21 @@ static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv, > gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask); > } > > +#define ICL_AUX_PW_TO_CH(pw_idx) \ > + ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A) > + > +#define ICL_TBT_AUX_PW_TO_CH(pw_idx) \ > + ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C) > + > +static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private *dev_priv, > + struct i915_power_well *power_well) > +{ > + int pw_idx = power_well->desc->hsw.idx; > + > + return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) : > + ICL_AUX_PW_TO_CH(pw_idx); > +} > + > static struct intel_digital_port * > aux_ch_to_digital_port(struct drm_i915_private *dev_priv, > enum aux_ch aux_ch) > @@ -311,6 +326,27 @@ aux_ch_to_digital_port(struct drm_i915_private *dev_priv, > return dig_port; > } > > +static bool tc_phy_aux_timeout_expected(struct drm_i915_private *dev_priv, > + struct i915_power_well *power_well) > +{ > + /* An AUX timeout is expected if the TBT DP tunnel is down. */ > + if (power_well->desc->hsw.is_tc_tbt) > + return true; > + > + /* > + * An AUX timeout is expected because we enable TC legacy port aux > + * to hold port out of TC cold > + */ > + if (INTEL_GEN(dev_priv) == 11) { You missed my comment on the previous version, should be: if (GEN==11 && power_well->desc->ops == &icl_tc_phy_aux_power_well_ops) { > + enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); > + struct intel_digital_port *dig_port = aux_ch_to_digital_port(dev_priv, aux_ch); > + > + return dig_port->tc_legacy_port; > + } > + > + return false; > +} > + > static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv, > struct i915_power_well *power_well) > { > @@ -323,8 +359,9 @@ static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv, > drm_dbg_kms(&dev_priv->drm, "%s power well enable timeout\n", > power_well->desc->name); > > - /* An AUX timeout is expected if the TBT DP tunnel is down. */ > - drm_WARN_ON(&dev_priv->drm, !power_well->desc->hsw.is_tc_tbt); > + drm_WARN_ON(&dev_priv->drm, > + !tc_phy_aux_timeout_expected(dev_priv, power_well)); > + > } > } > > @@ -520,21 +557,6 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv, > hsw_wait_for_power_well_disable(dev_priv, power_well); > } > > -#define ICL_AUX_PW_TO_CH(pw_idx) \ > - ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A) > - > -#define ICL_TBT_AUX_PW_TO_CH(pw_idx) \ > - ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C) > - > -static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private *dev_priv, > - struct i915_power_well *power_well) > -{ > - int pw_idx = power_well->desc->hsw.idx; > - > - return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) : > - ICL_AUX_PW_TO_CH(pw_idx); > -} > - > #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) > > static u64 async_put_domains_mask(struct i915_power_domains *power_domains); > -- > 2.26.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, 2020-04-14 at 20:47 +0300, Imre Deak wrote: > On Mon, Apr 13, 2020 at 09:45:14AM -0700, José Roberto de Souza > wrote: > > This is a expected timeout of static TC ports not conneceted, so > > not throwing warnings that would taint CI. > > > > v3: > > - moved checks to tc_phy_aux_timeout_expected() > > > > v4: > > - moved and add comments to tc_phy_aux_timeout_expected() > > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > --- > > .../drm/i915/display/intel_display_power.c | 56 +++++++++++++ > > ------ > > 1 file changed, 39 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > > b/drivers/gpu/drm/i915/display/intel_display_power.c > > index 00de926aaccf..2d2125d1534b 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > > @@ -284,6 +284,21 @@ static void hsw_power_well_pre_disable(struct > > drm_i915_private *dev_priv, > > gen8_irq_power_well_pre_disable(dev_priv, > > irq_pipe_mask); > > } > > > > +#define ICL_AUX_PW_TO_CH(pw_idx) \ > > + ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A) > > + > > +#define ICL_TBT_AUX_PW_TO_CH(pw_idx) \ > > + ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C) > > + > > +static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private > > *dev_priv, > > + struct i915_power_well > > *power_well) > > +{ > > + int pw_idx = power_well->desc->hsw.idx; > > + > > + return power_well->desc->hsw.is_tc_tbt ? > > ICL_TBT_AUX_PW_TO_CH(pw_idx) : > > + ICL_AUX_PW_TO_CH(pw_id > > x); > > +} > > + > > static struct intel_digital_port * > > aux_ch_to_digital_port(struct drm_i915_private *dev_priv, > > enum aux_ch aux_ch) > > @@ -311,6 +326,27 @@ aux_ch_to_digital_port(struct drm_i915_private > > *dev_priv, > > return dig_port; > > } > > > > +static bool tc_phy_aux_timeout_expected(struct drm_i915_private > > *dev_priv, > > + struct i915_power_well > > *power_well) > > +{ > > + /* An AUX timeout is expected if the TBT DP tunnel is down. */ > > + if (power_well->desc->hsw.is_tc_tbt) > > + return true; > > + > > + /* > > + * An AUX timeout is expected because we enable TC legacy port > > aux > > + * to hold port out of TC cold > > + */ > > + if (INTEL_GEN(dev_priv) == 11) { > > You missed my comment on the previous version, should be: > if (GEN==11 && power_well->desc->ops == > &icl_tc_phy_aux_power_well_ops) { Sorry, fixing it. > > > + enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, > > power_well); > > + struct intel_digital_port *dig_port = > > aux_ch_to_digital_port(dev_priv, aux_ch); > > + > > + return dig_port->tc_legacy_port; > > + } > > + > > + return false; > > +} > > + > > static void hsw_wait_for_power_well_enable(struct drm_i915_private > > *dev_priv, > > struct i915_power_well > > *power_well) > > { > > @@ -323,8 +359,9 @@ static void > > hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv, > > drm_dbg_kms(&dev_priv->drm, "%s power well enable > > timeout\n", > > power_well->desc->name); > > > > - /* An AUX timeout is expected if the TBT DP tunnel is > > down. */ > > - drm_WARN_ON(&dev_priv->drm, !power_well->desc- > > >hsw.is_tc_tbt); > > + drm_WARN_ON(&dev_priv->drm, > > + !tc_phy_aux_timeout_expected(dev_priv, > > power_well)); > > + > > } > > } > > > > @@ -520,21 +557,6 @@ icl_combo_phy_aux_power_well_disable(struct > > drm_i915_private *dev_priv, > > hsw_wait_for_power_well_disable(dev_priv, power_well); > > } > > > > -#define ICL_AUX_PW_TO_CH(pw_idx) \ > > - ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A) > > - > > -#define ICL_TBT_AUX_PW_TO_CH(pw_idx) \ > > - ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C) > > - > > -static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private > > *dev_priv, > > - struct i915_power_well > > *power_well) > > -{ > > - int pw_idx = power_well->desc->hsw.idx; > > - > > - return power_well->desc->hsw.is_tc_tbt ? > > ICL_TBT_AUX_PW_TO_CH(pw_idx) : > > - ICL_AUX_PW_TO_CH(pw_id > > x); > > -} > > - > > #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) > > > > static u64 async_put_domains_mask(struct i915_power_domains > > *power_domains); > > -- > > 2.26.0 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 00de926aaccf..2d2125d1534b 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -284,6 +284,21 @@ static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv, gen8_irq_power_well_pre_disable(dev_priv, irq_pipe_mask); } +#define ICL_AUX_PW_TO_CH(pw_idx) \ + ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A) + +#define ICL_TBT_AUX_PW_TO_CH(pw_idx) \ + ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C) + +static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) +{ + int pw_idx = power_well->desc->hsw.idx; + + return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) : + ICL_AUX_PW_TO_CH(pw_idx); +} + static struct intel_digital_port * aux_ch_to_digital_port(struct drm_i915_private *dev_priv, enum aux_ch aux_ch) @@ -311,6 +326,27 @@ aux_ch_to_digital_port(struct drm_i915_private *dev_priv, return dig_port; } +static bool tc_phy_aux_timeout_expected(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) +{ + /* An AUX timeout is expected if the TBT DP tunnel is down. */ + if (power_well->desc->hsw.is_tc_tbt) + return true; + + /* + * An AUX timeout is expected because we enable TC legacy port aux + * to hold port out of TC cold + */ + if (INTEL_GEN(dev_priv) == 11) { + enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); + struct intel_digital_port *dig_port = aux_ch_to_digital_port(dev_priv, aux_ch); + + return dig_port->tc_legacy_port; + } + + return false; +} + static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv, struct i915_power_well *power_well) { @@ -323,8 +359,9 @@ static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv, drm_dbg_kms(&dev_priv->drm, "%s power well enable timeout\n", power_well->desc->name); - /* An AUX timeout is expected if the TBT DP tunnel is down. */ - drm_WARN_ON(&dev_priv->drm, !power_well->desc->hsw.is_tc_tbt); + drm_WARN_ON(&dev_priv->drm, + !tc_phy_aux_timeout_expected(dev_priv, power_well)); + } } @@ -520,21 +557,6 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv, hsw_wait_for_power_well_disable(dev_priv, power_well); } -#define ICL_AUX_PW_TO_CH(pw_idx) \ - ((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A) - -#define ICL_TBT_AUX_PW_TO_CH(pw_idx) \ - ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C) - -static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well) -{ - int pw_idx = power_well->desc->hsw.idx; - - return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) : - ICL_AUX_PW_TO_CH(pw_idx); -} - #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) static u64 async_put_domains_mask(struct i915_power_domains *power_domains);
This is a expected timeout of static TC ports not conneceted, so not throwing warnings that would taint CI. v3: - moved checks to tc_phy_aux_timeout_expected() v4: - moved and add comments to tc_phy_aux_timeout_expected() Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- .../drm/i915/display/intel_display_power.c | 56 +++++++++++++------ 1 file changed, 39 insertions(+), 17 deletions(-)