diff mbox series

[5/5] drm/i915: Split ctx timestamp selftest into two

Message ID 20200421131633.8246-5-mika.kuoppala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/5] drm/i915: Make define for lrc state offset | expand

Commit Message

Mika Kuoppala April 21, 2020, 1:16 p.m. UTC 
We use different workarounds for render engine than
for other engines. Split the selftest according to these
types so that we get error rates per workaround.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/selftest_lrc.c | 26 +++++++++++++++++++++++---
 1 file changed, 23 insertions(+), 3 deletions(-)

Comments

Chris Wilson April 21, 2020, 1:35 p.m. UTC | #1 
Quoting Mika Kuoppala (2020-04-21 14:16:33)
> @@ -4774,6 +4773,12 @@ static int live_lrc_timestamp(void *arg)
>                 unsigned long heartbeat;
>                 int i, err = 0;
>  
> +               if (rcs && data.engine->class != RENDER_CLASS)
> +                       continue;
> +
> +               if (!rcs && data.engine->class == RENDER_CLASS)
> +                       continue;

At least have a bit of finesse and do
if (!(class & BIT(data.engine->engine->class)))
	continue;
Mika Kuoppala April 21, 2020, 1:45 p.m. UTC | #2 
Chris Wilson <chris@chris-wilson.co.uk> writes:

> Quoting Mika Kuoppala (2020-04-21 14:16:33)
>> @@ -4774,6 +4773,12 @@ static int live_lrc_timestamp(void *arg)
>>                 unsigned long heartbeat;
>>                 int i, err = 0;
>>  
>> +               if (rcs && data.engine->class != RENDER_CLASS)
>> +                       continue;
>> +
>> +               if (!rcs && data.engine->class == RENDER_CLASS)
>> +                       continue;
>
> At least have a bit of finesse and do
> if (!(class & BIT(data.engine->engine->class)))

I looked at the engine mask and I knew there must be a better way.
-Mika

> 	continue;
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 32c4096b627b..7daee5ca7d3b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -4749,10 +4749,9 @@  static int __lrc_timestamp(const struct lrc_timestamp *arg, bool preempt)
 	return err;
 }
 
-static int live_lrc_timestamp(void *arg)
+static int __live_lrc_timestamp(struct intel_gt *gt, bool rcs)
 {
 	struct lrc_timestamp data = {};
-	struct intel_gt *gt = arg;
 	enum intel_engine_id id;
 	const u32 poison[] = {
 		0,
@@ -4774,6 +4773,12 @@  static int live_lrc_timestamp(void *arg)
 		unsigned long heartbeat;
 		int i, err = 0;
 
+		if (rcs && data.engine->class != RENDER_CLASS)
+			continue;
+
+		if (!rcs && data.engine->class == RENDER_CLASS)
+			continue;
+
 		engine_heartbeat_disable(data.engine, &heartbeat);
 
 		for (i = 0; i < ARRAY_SIZE(data.ce); i++) {
@@ -4825,6 +4830,20 @@  static int live_lrc_timestamp(void *arg)
 	return 0;
 }
 
+static int live_lrc_timestamp_rcs(void *arg)
+{
+	struct intel_gt *gt = arg;
+
+	return __live_lrc_timestamp(gt, true);
+}
+
+static int live_lrc_timestamp_xcs(void *arg)
+{
+	struct intel_gt *gt = arg;
+
+	return __live_lrc_timestamp(gt, false);
+}
+
 static struct i915_vma *
 create_user_vma(struct i915_address_space *vm, unsigned long size)
 {
@@ -5748,7 +5767,8 @@  int intel_lrc_live_selftests(struct drm_i915_private *i915)
 		SUBTEST(live_lrc_state),
 		SUBTEST(live_lrc_gpr),
 		SUBTEST(live_lrc_indirect_ctx_bb),
-		SUBTEST(live_lrc_timestamp),
+		SUBTEST(live_lrc_timestamp_rcs),
+		SUBTEST(live_lrc_timestamp_xcs),
 		SUBTEST(live_lrc_garbage),
 		SUBTEST(live_pphwsp_runtime),
 		SUBTEST(live_lrc_isolation),