| Message ID | 20200430154735.22434-9-mika.kuoppala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/9] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate" | expand |
Quoting Mika Kuoppala (2020-04-30 16:47:35) > Request boundary is a global observation point for > all operations. Thus flush the LLC too. > > Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> This one always concerned me for being unbounded in cost: flush all the LLC lines that might be framebuffer. We don't mix scanout and LLC, so we've never felt concerned to enable this flush. [It's definitely not gen12+!] I would not enable this bit without good cause and verification it doesn't cost anything for normal render paths. Still we need to record this bit. For example, I might suggest it is coupled into the flush-display path directly. -Chris
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h index 69979cc86caa..a7f4f0934508 100644 --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h @@ -223,6 +223,7 @@ #define PIPE_CONTROL_COMMAND_CACHE_INVALIDATE (1<<29) /* gen11+ */ #define PIPE_CONTROL_TILE_CACHE_FLUSH (1<<28) /* gen11+ */ #define PIPE_CONTROL_FLUSH_L3 (1<<27) +#define PIPE_CONTROL_FLUSH_LLC (1<<26) /* gen12+ */ #define PIPE_CONTROL_FLUSH_AMFS (1<<25) /* gen12+ */ #define PIPE_CONTROL_GLOBAL_GTT_IVB (1<<24) /* gen7+ */ #define PIPE_CONTROL_MMIO_WRITE (1<<23) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 859c901c8935..2a4ef2ea042f 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -4555,6 +4555,7 @@ static int gen12_emit_flush_render(struct i915_request *request, flags |= PIPE_CONTROL_L3_FABRIC_FLUSH; flags |= PIPE_CONTROL_TILE_CACHE_FLUSH; flags |= PIPE_CONTROL_FLUSH_L3; + flags |= PIPE_CONTROL_FLUSH_LLC; flags |= PIPE_CONTROL_FLUSH_AMFS; flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH; @@ -4776,6 +4777,7 @@ gen12_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) PIPE_CONTROL_L3_FABRIC_FLUSH | PIPE_CONTROL_TILE_CACHE_FLUSH | PIPE_CONTROL_FLUSH_L3 | + PIPE_CONTROL_FLUSH_LLC | PIPE_CONTROL_FLUSH_AMFS | PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | PIPE_CONTROL_DEPTH_CACHE_FLUSH |
Request boundary is a global observation point for all operations. Thus flush the LLC too. Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 + drivers/gpu/drm/i915/gt/intel_lrc.c | 2 ++ 2 files changed, 3 insertions(+)