diff mbox series

[v2,1/3] drm/i915: Setup multicast register steering for all gen >= 10

Message ID 20200502045744.407060-2-matthew.d.roper@intel.com (mailing list archive)
State New, archived
Headers show
Series Steer multicast register workaround verification | expand

Commit Message

Matt Roper May 2, 2020, 4:57 a.m. UTC 
Steering of multicast registers for workarounds is needed on all
platforms gen10 and above.  Move the wa_init_mcr() call to the
higher-level gt_init_workarounds() rather than re-calling it for each
individual platform.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Comments

Chris Wilson May 2, 2020, 7:57 a.m. UTC | #1 
Quoting Matt Roper (2020-05-02 05:57:42)
> @@ -961,6 +955,9 @@ tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  static void
>  gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
>  {
> +       if (INTEL_GEN(i915) >= 10)
> +               wa_init_mcr(i915, wal);

The interaction between the MCR steering and the replay of w/a is not
obvious, it could do with a comment to avoid future mistakes.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index adddc5c93b48..4a255de13394 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -870,8 +870,6 @@  wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
 static void
 cnl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 {
-	wa_init_mcr(i915, wal);
-
 	/* WaDisableI2mCycleOnWRPort:cnl (pre-prod) */
 	if (IS_CNL_REVID(i915, CNL_REVID_B0, CNL_REVID_B0))
 		wa_write_or(wal,
@@ -887,8 +885,6 @@  cnl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 static void
 icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 {
-	wa_init_mcr(i915, wal);
-
 	/* WaInPlaceDecompressionHang:icl */
 	wa_write_or(wal,
 		    GEN9_GAMT_ECO_REG_RW_IA,
@@ -943,8 +939,6 @@  icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 static void
 tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 {
-	wa_init_mcr(i915, wal);
-
 	/* Wa_1409420604:tgl */
 	if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0))
 		wa_write_or(wal,
@@ -961,6 +955,9 @@  tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 static void
 gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
 {
+	if (INTEL_GEN(i915) >= 10)
+		wa_init_mcr(i915, wal);
+
 	if (IS_GEN(i915, 12))
 		tgl_gt_workarounds_init(i915, wal);
 	else if (IS_GEN(i915, 11))