@@ -1019,22 +1019,11 @@ static unsigned int reloc_bb_flags(const struct reloc_cache *cache)
return cache->gen > 5 ? 0 : I915_DISPATCH_SECURE;
}
-static int reloc_gpu_flush(struct reloc_cache *cache)
+static int reloc_gpu_emit(struct reloc_cache *cache)
{
struct i915_request *rq = cache->rq;
int err;
- if (cache->rq_vma) {
- struct drm_i915_gem_object *obj = cache->rq_vma->obj;
-
- GEM_BUG_ON(cache->rq_size >= obj->base.size / sizeof(u32));
- cache->rq_cmd[cache->rq_size++] = MI_BATCH_BUFFER_END;
-
- __i915_gem_object_flush_map(obj,
- 0, sizeof(u32) * cache->rq_size);
- i915_gem_object_unpin_map(obj);
- }
-
err = 0;
if (rq->engine->emit_init_breadcrumb)
err = rq->engine->emit_init_breadcrumb(rq);
@@ -1046,10 +1035,26 @@ static int reloc_gpu_flush(struct reloc_cache *cache)
if (err)
i915_request_set_error_once(rq, err);
+ return err;
+}
+
+static void reloc_gpu_flush(struct reloc_cache *cache)
+{
+ struct i915_request *rq = cache->rq;
+
+ if (cache->rq_vma) {
+ struct drm_i915_gem_object *obj = cache->rq_vma->obj;
+
+ GEM_BUG_ON(cache->rq_size >= obj->base.size / sizeof(u32));
+ cache->rq_cmd[cache->rq_size++] = MI_BATCH_BUFFER_END;
+
+ __i915_gem_object_flush_map(obj,
+ 0, sizeof(u32) * cache->rq_size);
+ i915_gem_object_unpin_map(obj);
+ }
+
intel_gt_chipset_flush(rq->engine->gt);
i915_request_add(rq);
-
- return err;
}
static int
@@ -1605,7 +1610,7 @@ static int reloc_gpu_alloc(struct i915_execbuffer *eb)
static int reloc_gpu(struct i915_execbuffer *eb)
{
struct eb_vma *ev;
- int flush, err;
+ int err;
err = reloc_gpu_alloc(eb);
if (err)
@@ -1613,19 +1618,21 @@ static int reloc_gpu(struct i915_execbuffer *eb)
GEM_BUG_ON(!eb->reloc_cache.rq);
err = lock_relocs(eb);
+ if (err)
+ return err;
+
+ err = reloc_gpu_emit(&eb->reloc_cache);
if (err)
goto out;
list_for_each_entry(ev, &eb->relocs, reloc_link) {
err = eb_relocate_vma(eb, ev);
if (err)
- goto out;
+ break;
}
out:
- flush = reloc_gpu_flush(&eb->reloc_cache);
- if (!err)
- err = flush;
+ reloc_gpu_flush(&eb->reloc_cache);
return err;
}
@@ -46,6 +46,10 @@ static int __igt_gpu_reloc(struct i915_execbuffer *eb,
if (err)
goto unpin_vma;
+ err = reloc_gpu_emit(&eb->reloc_cache);
+ if (err)
+ goto unpin_vma;
+
/* 8-Byte aligned */
err = __reloc_entry_gpu(eb, ev.vma, offsets[0] * sizeof(u32), 0);
if (err)
@@ -70,9 +74,7 @@ static int __igt_gpu_reloc(struct i915_execbuffer *eb,
GEM_BUG_ON(!eb->reloc_cache.rq);
rq = i915_request_get(eb->reloc_cache.rq);
- err = reloc_gpu_flush(&eb->reloc_cache);
- if (err)
- goto put_rq;
+ reloc_gpu_flush(&eb->reloc_cache);
err = i915_gem_object_wait(obj, I915_WAIT_INTERRUPTIBLE, HZ / 2);
if (err) {
If we get interrupted in the middle of chaining up the relocation entries, we will fail to submit the relocation batch. However, we will report having already completed some of the relocations, and so the reloc.presumed_offset will no longer match the batch contents, causing confusion and invalid future batches. If we build the relocation request packet first, we can always emit as far as we get up in the relocation chain. Fixes: 0e97fbb08055 ("drm/i915/gem: Use a single chained reloc batches for a single execbuf") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 45 +++++++++++-------- .../i915/gem/selftests/i915_gem_execbuffer.c | 8 ++-- 2 files changed, 31 insertions(+), 22 deletions(-)