@@ -1016,7 +1016,7 @@ __emit_semaphore_wait(struct i915_request *to,
int len, err;
u32 *cs;
- GEM_BUG_ON(INTEL_GEN(to->i915) < 8);
+ GEM_BUG_ON(INTEL_GEN(to->i915) < 6);
GEM_BUG_ON(i915_request_has_initial_breadcrumb(to));
/* We need to pin the signaler's HWSP until we are finished reading. */
@@ -1040,17 +1040,26 @@ __emit_semaphore_wait(struct i915_request *to,
* (post-wrap) values than they were expecting (and so wait
* forever).
*/
- *cs++ = (MI_SEMAPHORE_WAIT |
- MI_SEMAPHORE_GLOBAL_GTT |
- MI_SEMAPHORE_POLL |
- MI_SEMAPHORE_SAD_GTE_SDD) +
- has_token;
- *cs++ = seqno;
- *cs++ = hwsp_offset;
- *cs++ = 0;
- if (has_token) {
+ if (INTEL_GEN(to->i915) >= 8) {
+ *cs++ = (MI_SEMAPHORE_WAIT |
+ MI_SEMAPHORE_GLOBAL_GTT |
+ MI_SEMAPHORE_POLL |
+ MI_SEMAPHORE_SAD_GTE_SDD) +
+ has_token;
+ *cs++ = seqno;
+ *cs++ = hwsp_offset;
+ *cs++ = 0;
+ if (has_token) {
+ *cs++ = 0;
+ *cs++ = MI_NOOP;
+ }
+ } else {
+ *cs++ = (MI_SEMAPHORE_MBOX |
+ MI_SEMAPHORE_GLOBAL_GTT |
+ MI_SEMAPHORE_COMPARE);
+ *cs++ = seqno - 1; /* COMPARE is a strict greater-than */
+ *cs++ = hwsp_offset;
*cs++ = 0;
- *cs++ = MI_NOOP;
}
intel_ring_advance(to, cs);
Should we gain per-client timelines, we can then utilise the separate HWSP in order to use MI_SEMAPHORE_MBOX with the unique GGTT addresses required for synchronising between clients across different engines. Teach the emit_semaphore_wait about MI_SEMAPHORE_MBOX for the older generations. Note that the engine must still indicate support for the semaphore synchronisation before the context is allowed to use them. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_request.c | 31 +++++++++++++++++++---------- 1 file changed, 20 insertions(+), 11 deletions(-)