From patchwork Wed Jun 3 21:15:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 11586263 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A9F9C1391 for ; Wed, 3 Jun 2020 21:15:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91EAD20734 for ; Wed, 3 Jun 2020 21:15:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 91EAD20734 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BAB7389ECB; Wed, 3 Jun 2020 21:15:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2414789EBD for ; Wed, 3 Jun 2020 21:15:49 +0000 (UTC) IronPort-SDR: euZQC8cl+ixAiT66rXECY9U7X0Jg5m9UromqdEltKhC2NfD6Kx8QIi7o0kV1qqK7DeXEA4oJ3n Uc4Qwa9E0P8w== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jun 2020 14:15:48 -0700 IronPort-SDR: 1dI/bCgALNM5T2MJSr63GS4VhsgG4LlQqFTK50qswHhUGJPyCDWwwHlB5e8+NdKOqUyrDKO4yb MUS4RMmFgiOw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,469,1583222400"; d="scan'208";a="258715101" Received: from mdroper-desk1.fm.intel.com ([10.1.27.168]) by fmsmga008.fm.intel.com with ESMTP; 03 Jun 2020 14:15:48 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Wed, 3 Jun 2020 14:15:23 -0700 Message-Id: <20200603211529.3005059-10-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200603211529.3005059-1-matthew.d.roper@intel.com> References: <20200603211529.3005059-1-matthew.d.roper@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 09/15] drm/i915/rkl: Don't try to access transcoder D X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" There are a couple places in our driver that loop over transcoders A..D for gen11+; since RKL only has three pipes/transcoders, this can lead to unclaimed register reads/writes. We should add checks for transcoder existence where appropriate. v2: Move one transcoder check that wound up in the wrong function after conflict resolution. It belongs in bdw_get_trans_port_sync_config rather than bxt_get_dsi_transcoder_state. v3: Switch loops to use for_each_cpu_transcoder_masked() since this iterator already checks the platform's transcoder mask for us. (Ville) Cc: Aditya Swarup Cc: Ville Syrjälä Signed-off-by: Matt Roper Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_irq.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f3ea81a17352..40a71c4a1ef5 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2885,13 +2885,15 @@ static void gen11_display_irq_reset(struct drm_i915_private *dev_priv) { struct intel_uncore *uncore = &dev_priv->uncore; enum pipe pipe; + u32 trans_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | + BIT(TRANSCODER_C) | BIT(TRANSCODER_D); intel_uncore_write(uncore, GEN11_DISPLAY_INT_CTL, 0); if (INTEL_GEN(dev_priv) >= 12) { enum transcoder trans; - for (trans = TRANSCODER_A; trans <= TRANSCODER_D; trans++) { + for_each_cpu_transcoder_masked(dev_priv, trans, trans_mask) { enum intel_display_power_domain domain; domain = POWER_DOMAIN_TRANSCODER(trans); @@ -3413,6 +3415,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) u32 de_port_masked = gen8_de_port_aux_mask(dev_priv); u32 de_port_enables; u32 de_misc_masked = GEN8_DE_EDP_PSR; + u32 trans_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | + BIT(TRANSCODER_C) | BIT(TRANSCODER_D); enum pipe pipe; if (INTEL_GEN(dev_priv) <= 10) @@ -3433,7 +3437,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) if (INTEL_GEN(dev_priv) >= 12) { enum transcoder trans; - for (trans = TRANSCODER_A; trans <= TRANSCODER_D; trans++) { + for_each_cpu_transcoder_masked(dev_priv, trans, trans_mask) { enum intel_display_power_domain domain; domain = POWER_DOMAIN_TRANSCODER(trans);