diff mbox series

drm/i915/display/fbc: Disable fbc by default on TGL

Message ID 20200716085540.2211-1-uma.shankar@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/display/fbc: Disable fbc by default on TGL | expand

Commit Message

Shankar, Uma July 16, 2020, 8:55 a.m. UTC
Fbc is causing random underruns in CI execution on TGL platforms.
Disabling the same while the problem is being debugged and analyzed.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Ville Syrjälä July 16, 2020, 12:38 p.m. UTC | #1
On Thu, Jul 16, 2020 at 02:25:40PM +0530, Uma Shankar wrote:
> Fbc is causing random underruns in CI execution on TGL platforms.
> Disabling the same while the problem is being debugged and analyzed.
> 
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>

Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 3a4f980788a6..1d6370b29b27 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1420,6 +1420,13 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv)
>   */
>  static int intel_sanitize_fbc_option(struct drm_i915_private *dev_priv)
>  {
> +	/*
> +	 * Fbc is causing random underruns in CI execution on TGL platforms.
> +	 * Disabling the same while the problem is being debugged and analyzed.
> +	 */
> +	if (IS_TIGERLAKE(dev_priv))
> +		return 0;
> +
>  	if (dev_priv->params.enable_fbc >= 0)
>  		return !!dev_priv->params.enable_fbc;
>  
> -- 
> 2.22.0
Ville Syrjälä July 16, 2020, 12:48 p.m. UTC | #2
On Thu, Jul 16, 2020 at 03:38:03PM +0300, Ville Syrjälä wrote:
> On Thu, Jul 16, 2020 at 02:25:40PM +0530, Uma Shankar wrote:
> > Fbc is causing random underruns in CI execution on TGL platforms.
> > Disabling the same while the problem is being debugged and analyzed.
> > 
> > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> 
> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Scratch that...

> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_fbc.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 3a4f980788a6..1d6370b29b27 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1420,6 +1420,13 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv)
> >   */
> >  static int intel_sanitize_fbc_option(struct drm_i915_private *dev_priv)
> >  {
> > +	/*
> > +	 * Fbc is causing random underruns in CI execution on TGL platforms.
> > +	 * Disabling the same while the problem is being debugged and analyzed.
> > +	 */
> > +	if (IS_TIGERLAKE(dev_priv))
> > +		return 0;

... looks lke this should be done *after* the modparam check below.
Otherwise we can't enable fbc for testing via the modparam.

> > +
> >  	if (dev_priv->params.enable_fbc >= 0)
> >  		return !!dev_priv->params.enable_fbc;
> >  
> > -- 
> > 2.22.0
> 
> -- 
> Ville Syrjälä
> Intel
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Shankar, Uma July 16, 2020, 2:29 p.m. UTC | #3
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Thursday, July 16, 2020 6:19 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display/fbc: Disable fbc by default on
> TGL
> 
> On Thu, Jul 16, 2020 at 03:38:03PM +0300, Ville Syrjälä wrote:
> > On Thu, Jul 16, 2020 at 02:25:40PM +0530, Uma Shankar wrote:
> > > Fbc is causing random underruns in CI execution on TGL platforms.
> > > Disabling the same while the problem is being debugged and analyzed.
> > >
> > > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> >
> > Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Scratch that...
> 
> >
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_fbc.c | 7 +++++++
> > >  1 file changed, 7 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 3a4f980788a6..1d6370b29b27 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -1420,6 +1420,13 @@ void intel_fbc_handle_fifo_underrun_irq(struct
> drm_i915_private *dev_priv)
> > >   */
> > >  static int intel_sanitize_fbc_option(struct drm_i915_private
> > > *dev_priv)  {
> > > +	/*
> > > +	 * Fbc is causing random underruns in CI execution on TGL platforms.
> > > +	 * Disabling the same while the problem is being debugged and analyzed.
> > > +	 */
> > > +	if (IS_TIGERLAKE(dev_priv))
> > > +		return 0;
> 
> ... looks lke this should be done *after* the modparam check below.
> Otherwise we can't enable fbc for testing via the modparam.

Oh yeah, updated the change and sent a v2 with fix. Thanks Ville.

Regards,
Uma Shankar

> > > +
> > >  	if (dev_priv->params.enable_fbc >= 0)
> > >  		return !!dev_priv->params.enable_fbc;
> > >
> > > --
> > > 2.22.0
> >
> > --
> > Ville Syrjälä
> > Intel
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Ville Syrjälä
> Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 3a4f980788a6..1d6370b29b27 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1420,6 +1420,13 @@  void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv)
  */
 static int intel_sanitize_fbc_option(struct drm_i915_private *dev_priv)
 {
+	/*
+	 * Fbc is causing random underruns in CI execution on TGL platforms.
+	 * Disabling the same while the problem is being debugged and analyzed.
+	 */
+	if (IS_TIGERLAKE(dev_priv))
+		return 0;
+
 	if (dev_priv->params.enable_fbc >= 0)
 		return !!dev_priv->params.enable_fbc;