diff mbox series

[2/2] drm/i915/display/dp: Hacks for testing link training fail errors

Message ID 20200716232900.28414-2-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/i915/dp: HAX Try the bspec value for CLKTOP2_CORECLKCTL | expand

Commit Message

Navare, Manasi July 16, 2020, 11:28 p.m. UTC
Keep the link rate const at 2.7 Gpbs, lane count =4 and do not
fallback on link training. See if kms_atomic_transition test passes
in constant configuration

Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c               | 7 +++++--
 drivers/gpu/drm/i915/display/intel_dp_link_training.c | 6 +++---
 2 files changed, 8 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index d6295eb20b63..070d8f83a28a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -425,6 +425,9 @@  static void intel_dp_set_common_rates(struct intel_dp *intel_dp)
 		intel_dp->common_rates[0] = 162000;
 		intel_dp->num_common_rates = 1;
 	}
+	/* Hack for VLK-7806 testing */
+	intel_dp->common_rates[0] = 270000;
+	intel_dp->num_common_rates = 1;
 }
 
 static bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
@@ -2284,8 +2287,8 @@  intel_dp_compute_link_config(struct intel_encoder *encoder,
 	limits.min_clock = 0;
 	limits.max_clock = common_len - 1;
 
-	limits.min_lane_count = 1;
-	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
+	limits.min_lane_count = 4;
+	limits.max_lane_count = 4;/*intel_dp_max_lane_count(intel_dp);*/
 
 	limits.min_bpp = intel_dp_min_bpp(pipe_config);
 	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index f2c8b56be9ea..0653ace2b62a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -415,12 +415,12 @@  intel_dp_start_link_train(struct intel_dp *intel_dp)
 		drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
 			    "Link Training failed with HOBL active, not enabling it from now on");
 		intel_dp->hobl_failed = true;
-	} else if (intel_dp_get_link_train_fallback_values(intel_dp,
+	}/* else if (intel_dp_get_link_train_fallback_values(intel_dp,
 							   intel_dp->link_rate,
 							   intel_dp->lane_count)) {
 		return;
-	}
+		}*/
 
 	/* Schedule a Hotplug Uevent to userspace to start modeset */
-	schedule_work(&intel_connector->modeset_retry_work);
+	//schedule_work(&intel_connector->modeset_retry_work);
 }