| Message ID | 20200908140210.31048-2-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG | expand |
On Tue, 08 Sep 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The FBC_CONTROL save restore is there just to preserve the > compression interval setting. Since commit a68ce21ba0c4 > ("drm/i915/fbc: Store the fbc1 compression interval in the params") > we've been explicitly setting the interval to a specific > value, so the sace/restore is now entirely pointless. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Seems legit, Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 - > drivers/gpu/drm/i915/i915_suspend.c | 8 -------- > 2 files changed, 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2e4438e8e3eb..3917bb1a6157 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -537,7 +537,6 @@ struct intel_gmbus { > > struct i915_suspend_saved_registers { > u32 saveDSPARB; > - u32 saveFBC_CONTROL; > u32 saveCACHE_MODE_0; > u32 saveMI_ARB_STATE; > u32 saveSWF0[16]; > diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c > index ed2be3489f8e..592c230e6914 100644 > --- a/drivers/gpu/drm/i915/i915_suspend.c > +++ b/drivers/gpu/drm/i915/i915_suspend.c > @@ -37,10 +37,6 @@ static void i915_save_display(struct drm_i915_private *dev_priv) > /* Display arbitration control */ > if (INTEL_GEN(dev_priv) <= 4) > dev_priv->regfile.saveDSPARB = I915_READ(DSPARB); > - > - /* save FBC interval */ > - if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv)) > - dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL); > } > > static void i915_restore_display(struct drm_i915_private *dev_priv) > @@ -52,10 +48,6 @@ static void i915_restore_display(struct drm_i915_private *dev_priv) > /* only restore FBC info on the platform that supports FBC*/ > intel_fbc_global_disable(dev_priv); > > - /* restore FBC interval */ > - if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv)) > - I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL); > - > intel_vga_redisable(dev_priv); > }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2e4438e8e3eb..3917bb1a6157 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -537,7 +537,6 @@ struct intel_gmbus { struct i915_suspend_saved_registers { u32 saveDSPARB; - u32 saveFBC_CONTROL; u32 saveCACHE_MODE_0; u32 saveMI_ARB_STATE; u32 saveSWF0[16]; diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index ed2be3489f8e..592c230e6914 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -37,10 +37,6 @@ static void i915_save_display(struct drm_i915_private *dev_priv) /* Display arbitration control */ if (INTEL_GEN(dev_priv) <= 4) dev_priv->regfile.saveDSPARB = I915_READ(DSPARB); - - /* save FBC interval */ - if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv)) - dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL); } static void i915_restore_display(struct drm_i915_private *dev_priv) @@ -52,10 +48,6 @@ static void i915_restore_display(struct drm_i915_private *dev_priv) /* only restore FBC info on the platform that supports FBC*/ intel_fbc_global_disable(dev_priv); - /* restore FBC interval */ - if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv)) - I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL); - intel_vga_redisable(dev_priv); }