From patchwork Mon Sep 14 21:00:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uma Shankar X-Patchwork-Id: 11774825 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5C2E86CA for ; Mon, 14 Sep 2020 20:25:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3EB3D215A4 for ; Mon, 14 Sep 2020 20:25:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3EB3D215A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B0E5F6E598; Mon, 14 Sep 2020 20:25:14 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2074E6E58B for ; Mon, 14 Sep 2020 20:25:13 +0000 (UTC) IronPort-SDR: XQ9JF6EyerDX3yjoiJqsPgAiMJOV5adRXolAfPbdpvFFqG51sDeQn0lrtfyiWC0OhP9LYfzodC WQepjkSFi+jA== X-IronPort-AV: E=McAfee;i="6000,8403,9744"; a="223340809" X-IronPort-AV: E=Sophos;i="5.76,427,1592895600"; d="scan'208";a="223340809" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Sep 2020 13:25:12 -0700 IronPort-SDR: wGkrF8my7AMy1U5TvEiT7biaqEREjOfUHzxhPiwPhvEXwc9rC9kKoTYt4+0vwb9IurQJsHzNqk w4l7wreAamyA== X-IronPort-AV: E=Sophos;i="5.76,427,1592895600"; d="scan'208";a="306307177" Received: from unknown (HELO linux-desktop.iind.intel.com) ([10.223.34.173]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Sep 2020 13:25:11 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Tue, 15 Sep 2020 02:30:44 +0530 Message-Id: <20200914210047.11972-9-uma.shankar@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200914210047.11972-1-uma.shankar@intel.com> References: <20200914210047.11972-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v6 08/11] drm/i915/lspcon: Create separate infoframe_enabled helper X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Lspcon has Infoframes as well as DIP for HDR metadata(DRM Infoframe). Create a separate mechanism for lspcon compared to HDMI in order to address the same and ensure future scalability. Suggested-by: Ville Syrjälä Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_ddi.c | 10 +++++++--- drivers/gpu/drm/i915/display/intel_lspcon.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_lspcon.h | 2 ++ 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 6af080542c96..1b601b04f62f 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4307,6 +4307,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); u32 temp, flags = 0; /* XXX: DSI transcoder paranoia */ @@ -4392,9 +4393,12 @@ void intel_ddi_get_config(struct intel_encoder *encoder, pipe_config->fec_enable); } - pipe_config->infoframes.enable |= - intel_hdmi_infoframes_enabled(encoder, pipe_config); - + if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) + pipe_config->infoframes.enable |= + intel_lspcon_infoframes_enabled(encoder, pipe_config); + else + pipe_config->infoframes.enable |= + intel_hdmi_infoframes_enabled(encoder, pipe_config); break; case TRANS_DDI_MODE_SELECT_DP_MST: pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST); diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index ee77a5381cb5..5b2d96a80b49 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -30,6 +30,7 @@ #include "intel_display_types.h" #include "intel_dp.h" #include "intel_lspcon.h" +#include "intel_hdmi.h" /* LSPCON OUI Vendor ID(signatures) */ #define LSPCON_VENDOR_PARADE_OUI 0x001CF8 @@ -640,6 +641,23 @@ u32 lspcon_infoframes_enabled(struct intel_encoder *encoder, return val; } +u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder, + const struct intel_crtc_state *pipe_config) +{ + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); + u32 val, enabled = 0; + + val = dig_port->infoframes_enabled(encoder, pipe_config); + + if (val & VIDEO_DIP_ENABLE_AVI_HSW) + enabled |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); + + if (val & VIDEO_DIP_ENABLE_GMP_HSW) + enabled |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA); + + return enabled; +} + void lspcon_resume(struct intel_lspcon *lspcon) { enum drm_lspcon_mode expected_mode; diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index 1b9fb531128e..86305cc3a2d8 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -42,4 +42,6 @@ void lspcon_drm_read_infoframe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, unsigned int type, void *frame, ssize_t len); +u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder, + const struct intel_crtc_state *pipe_config); #endif /* __INTEL_LSPCON_H__ */