From patchwork Mon Sep 28 11:08:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11803447 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 636501580 for ; Mon, 28 Sep 2020 11:15:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3B7D3207E8 for ; Mon, 28 Sep 2020 11:15:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3B7D3207E8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E9CA989B0C; Mon, 28 Sep 2020 11:15:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 60C3E89B0C for ; Mon, 28 Sep 2020 11:15:49 +0000 (UTC) IronPort-SDR: B6hrN1YyDKydI+6Ozsgpxfk82vdIh4AtuqEwb6fm0hfVMlXwJ3qwxP8ADFlrAYZBhBYaJqhe61 Z8s1nocO7Nhg== X-IronPort-AV: E=McAfee;i="6000,8403,9757"; a="223568875" X-IronPort-AV: E=Sophos;i="5.77,313,1596524400"; d="scan'208";a="223568875" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2020 04:15:42 -0700 IronPort-SDR: lsSa9ImtbFCzO+vNqKfjXoF1Jl2z3Miz3rGSmDfzzfbZZEwsvc6wflhtQF7JwFfh4f5dMkFUuE V0pW2Kt4yKbQ== X-IronPort-AV: E=Sophos;i="5.77,313,1596524400"; d="scan'208";a="488533328" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 28 Sep 2020 04:15:40 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 28 Sep 2020 16:38:34 +0530 Message-Id: <20200928110834.15077-1-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20200924124209.17916-5-vandita.kulkarni@intel.com> References: <20200924124209.17916-5-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [15 4/5] drm/i915/dsi: Initiate frame request in cmd mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In TE Gate mode or TE NO_GATE mode on every flip we need to set the frame update request bit. After this bit is set transcoder hardware will automatically send the frame data to the panel in case of TE NO_GATE mode, where it sends after it receives the TE event in case of TE_GATE mode. Once the frame data is sent to the panel, we see the frame counter updating. v2: Use intel_de_read/write v3: remove the usage of private_flags v4: Use icl_dsi in func names if non static, fix code formatting issues. (Jani) v5: Send frame update request at the beginning of pipe_update_end, use crtc_state mode_flags (Ville) v6: Add platform and dsi checks (Ville) Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 26 +++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dsi.h | 1 + drivers/gpu/drm/i915/display/intel_sprite.c | 9 +++++++ 3 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 2789020e20db..fe946a2e2082 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -205,6 +205,32 @@ static int dsi_send_pkt_payld(struct intel_dsi_host *host, return 0; } +void icl_dsi_frame_update(struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + u32 tmp, mode_flags; + enum port port; + + mode_flags = crtc_state->mode_flags; + + /* + * case 1 also covers dual link + * In case of dual link, frame update should be set on + * DSI_0 + */ + if (mode_flags & I915_MODE_FLAG_DSI_USE_TE0) + port = PORT_A; + else if (mode_flags & I915_MODE_FLAG_DSI_USE_TE1) + port = PORT_B; + else + return; + + tmp = intel_de_read(dev_priv, DSI_CMD_FRMCTL(port)); + tmp |= DSI_FRAME_UPDATE_REQUEST; + intel_de_write(dev_priv, DSI_CMD_FRMCTL(port), tmp); +} + static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h index 19f78a4022d3..625f2f1ae061 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.h +++ b/drivers/gpu/drm/i915/display/intel_dsi.h @@ -167,6 +167,7 @@ static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder) /* icl_dsi.c */ void icl_dsi_init(struct drm_i915_private *dev_priv); +void icl_dsi_frame_update(struct intel_crtc_state *crtc_state); /* intel_dsi.c */ int intel_dsi_bitrate(const struct intel_dsi *intel_dsi); diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 63040cb0d4e1..2c07321eb1d0 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -47,6 +47,7 @@ #include "intel_frontbuffer.h" #include "intel_pm.h" #include "intel_psr.h" +#include "intel_dsi.h" #include "intel_sprite.h" int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, @@ -202,6 +203,14 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end); + /* + * Incase of mipi dsi command mode, we need to set frame update + * request for every commit. + */ + if (INTEL_GEN(dev_priv) >= 11 && + intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) + icl_dsi_frame_update(new_crtc_state); + /* We're still in the vblank-evade critical section, this can't race. * Would be slightly nice to just grab the vblank count and arm the * event outside of the critical section - the spinlock might spin for a