From patchwork Tue Oct 13 23:01:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 11836151 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7A1C14B5 for ; Tue, 13 Oct 2020 22:58:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CB2CC20B1F for ; Tue, 13 Oct 2020 22:58:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CB2CC20B1F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0BE426E97D; Tue, 13 Oct 2020 22:58:09 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id B0BBD6E150 for ; Tue, 13 Oct 2020 22:58:03 +0000 (UTC) IronPort-SDR: 2FWnS78QKFxecopl5cv38q19G38SdAp8IikIxcHUI5AUa3clgUkUnKOIUp4BuyapCrrjU3HryD zKgCPSjSnwrQ== X-IronPort-AV: E=McAfee;i="6000,8403,9773"; a="145315615" X-IronPort-AV: E=Sophos;i="5.77,372,1596524400"; d="scan'208";a="145315615" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 15:58:02 -0700 IronPort-SDR: yyKN9TulMgBOu5bKnGl8PrlXEGQr1fiJh0T1WYtLOHMwZtu9q04a8f4ecCiLriDd77WdI0MMqt 8p9fBpq6I/yw== X-IronPort-AV: E=Sophos;i="5.77,372,1596524400"; d="scan'208";a="313976720" Received: from josouza-mobl2.jf.intel.com (HELO josouza-MOBL2.intel.com) ([10.24.14.55]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 15:58:02 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Tue, 13 Oct 2020 16:01:21 -0700 Message-Id: <20201013230121.331595-6-jose.souza@intel.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201013230121.331595-1-jose.souza@intel.com> References: <20201013230121.331595-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 6/6] DEBUG: drm/i915/display: Add debug information to selective fetch X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Just for feature development, not needed in production. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_psr.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index c30d7069cbaa..1b2ae3bd02ee 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1194,11 +1194,19 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, /* TODO: consider auxiliary surfaces */ x = plane_state->uapi.src.x1 >> 16; - y = (plane_state->uapi.src.y1 >> 16) + clip->y1; + y = plane_state->uapi.src.y1 >> 16; + drm_info(&dev_priv->drm, "plane%c src.x=%i src.y=%i clip.y1=%i clip.y2=%i\n", + plane_name(plane->id), x, y, clip->y1, clip->y2); + drm_info(&dev_priv->drm, "\tcolor_plane[color_plane].x=%i color_plane[color_plane].y=%i\n", + plane_state->color_plane[color_plane].x, + plane_state->color_plane[color_plane].y); + + y += clip->y1; ret = skl_calc_main_surface_offset(plane_state, &x, &y, &offset); if (ret) drm_warn_once(&dev_priv->drm, "skl_calc_main_surface_offset() returned %i\n", ret); + drm_info(&dev_priv->drm, "\tcalculated offset x=%i y=%i\n", x, y); val = y << 16 | x; intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane->id), val); @@ -1335,6 +1343,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, pipe_dirty_areas[plane->id * 2 + 1] = new_plane_state->uapi.dst; } + drm_info(state->base.dev, "intel_psr2_sel_fetch_update()\n"); + for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { struct drm_rect *sel_fetch_area, temp; @@ -1411,6 +1421,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, if (j < 0) sel_fetch_area->y2 += j; + drm_info(state->base.dev, "\tplane%c y1=%i y2=%i dst.y1=%i dst.y2=%i\n", + plane_name(plane->id), sel_fetch_area->y1, + sel_fetch_area->y2, new_plane_state->uapi.dst.y1, + new_plane_state->uapi.dst.y2); + temp = *sel_fetch_area; temp.y1 += new_plane_state->uapi.dst.y1 >> 16; temp.y2 += new_plane_state->uapi.dst.y1 >> 16;